EP910PI-40 - 24-Macrocell Classic EPLD, 43ns, PDIP-40 | Altera
MPN: EP910PI-40 ⚠ Last Time Buy| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.2 | $162.00 |
| 100 | $13.95 | $1,395.00 |
| 500 | $11.4 | $5,700.00 |
| 1,000 | $9.85 | $9,850.00 |
EP910PI-40 Overview
What is an EPLD? An Erasable Programmable Logic Device (EPLD) is a non-volatile programmable logic device that uses UV-erasable CMOS technology. It sits in the hierarchy between simple PLAs/PALs and modern FPGAs/CPLDs, providing deterministic pin-to-pin logic timing, low power consumption, and in-system reprogrammability via an external EPROM programmer. Classic EPLDs like the EP910 were widely used in the late 1980s and 1990s as glue logic, bus interface controllers, and state-machine replacements for 7400-series TTL, with PAL-type macrocell architecture optimized for high-speed combinatorial and registered logic.
Key features of the EP910PI-40 include a PAL-type macrocell architecture, 24 macrocells, 12 dedicated inputs, 24 bidirectional I/O lines, 2 external clock inputs, and a tPD of 43 ns (commercial speed grade 40). The device supports both combinatorial and registered logic with user-configurable output polarity, and offers programmable I/O architecture with three-state output control. The CMOS process delivers low power consumption compared to bipolar PAL alternatives of the same era.
Typical applications include legacy TTL/CMOS glue-logic replacement, address decoding for microprocessor systems, bus-interface and arbiter logic, state-machine implementation for industrial controllers, and as a pin-compatible replacement for several bipolar PAL devices. Designers migrating from bipolar PALs benefit from reduced power, reprogrammability, and improved design security. According to distributor data, this part remains in active production via Rochester Electronics as a long-term support device.
When designing with this part, note that the EP910PI-40 requires a 5 V supply, programming via a legacy Altera programming hardware (such as the A+PLUS or MAX+PLUS baseline tools), and that the -40 speed grade is the slowest in the EP910 family. For new designs, designers should evaluate whether a modern CPLD (e.g., MAX V family) offers better cost, power, and toolchain support, but for legacy systems requiring exact drop-in replacement of installed EP910 hardware, the PI-40 remains the canonical part.
This page synthesizes distributor pricing from Jotrin, Octopart, and Rochester Electronics, drop-in alternatives across the EP910 speed-grade family, and practical design notes not found in the original manufacturer datasheet.
Drop-in alternatives for EP910PI-40 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with EP910PI-40 (same form factor and footprint) — differing in Supply Voltage (VCC), Package, Usable Gates, Technology, Mounting Type.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
EP910PI-35
✅ Drop-In✓ In Stock
$27.5 / Unit
View Datasheet →EP910PI-30T
✅ Drop-In✓ In Stock
$10.95 / Unit
View Datasheet →EP910PI-25
✅ Drop-In✓ In Stock
$10.95 / Unit
View Datasheet →EP910PC-30
✅ Drop-In✓ In Stock
$6.5 / Unit
View Datasheet →EP910PC-25
✅ Drop-In✓ In Stock
$16.92 / Unit
View Datasheet →EP910PC-20
✅ Drop-In✓ In Stock
$12.4 / Unit
View Datasheet →EP910PI-40 Maximum Ratings & Electrical Characteristics
| Device Family | Classic EPLD |
| Part Number | EP910PI-40 |
| Architecture | PAL-type macrocell, CMOS, UV-erasable |
| Number of Macrocells | 24 |
| Number of Dedicated Inputs | 12 |
| Number of I/O Lines | 24 |
| External Clock Inputs | 2 |
| Maximum Clock Frequency | 25 MHz |
| Propagation Delay (tPD) | 43 ns |
| Speed Grade | -40 (43 ns) |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) |
| Package | PDIP-40 (Plastic DIP, 40-pin) |
| Operating Temperature | 0C to +70C (commercial) |
| Mounting Type | Through-Hole |
| Process Technology | CMOS (UV-erasable) |
| Programming Method | UV-erase + Altera programmer (legacy) |
| Programmable Polarity | Yes (user-configurable output) |
| Output Enable Control | Yes (per-pin three-state) |
EP910PI-40 Pin Configuration
| Pin 1 | I/O0 — Bidirectional I/O pin 0 |
| Pin 2 | I/O1 — Bidirectional I/O pin 1 |
| Pin 3 | I/O2 — Bidirectional I/O pin 2 |
| Pin 4 | I/O3 — Bidirectional I/O pin 3 |
| Pin 5 | I/O4 — Bidirectional I/O pin 4 |
| Pin 6 | I/O5 — Bidirectional I/O pin 5 |
| Pin 7 | I/O6 — Bidirectional I/O pin 6 |
| Pin 8 | I/O7 — Bidirectional I/O pin 7 |
| Pin 9 | I/O8 — Bidirectional I/O pin 8 |
| Pin 10 | I/O9 — Bidirectional I/O pin 9 |
| Pin 11 | I/O10 — Bidirectional I/O pin 10 |
| Pin 12 | I/O11 — Bidirectional I/O pin 11 |
| Pin 13 | IN0 — Dedicated input 0 |
| Pin 14 | IN1 — Dedicated input 1 |
| Pin 15 | IN2 — Dedicated input 2 |
| Pin 16 | IN3 — Dedicated input 3 |
| Pin 17 | IN4 — Dedicated input 4 |
| Pin 18 | IN5 — Dedicated input 5 |
| Pin 19 | IN6 — Dedicated input 6 |
| Pin 20 | IN7 — Dedicated input 7 |
| Pin 21 | IN8 — Dedicated input 8 |
| Pin 22 | IN9 — Dedicated input 9 |
| Pin 23 | IN10 — Dedicated input 10 |
| Pin 24 | IN11 — Dedicated input 11 |
| Pin 25 | CLK1 — External clock input 1 |
| Pin 26 | CLK2 — External clock input 2 |
| Pin 27 | I/O12 — Bidirectional I/O pin 12 |
| Pin 28 | I/O13 — Bidirectional I/O pin 13 |
| Pin 29 | I/O14 — Bidirectional I/O pin 14 |
| Pin 30 | I/O15 — Bidirectional I/O pin 15 |
| Pin 31 | I/O16 — Bidirectional I/O pin 16 |
| Pin 32 | I/O17 — Bidirectional I/O pin 17 |
| Pin 33 | I/O18 — Bidirectional I/O pin 18 |
| Pin 34 | I/O19 — Bidirectional I/O pin 19 |
| Pin 35 | I/O20 — Bidirectional I/O pin 20 |
| Pin 36 | I/O21 — Bidirectional I/O pin 21 |
| Pin 37 | I/O22 — Bidirectional I/O pin 22 |
| Pin 38 | I/O23 — Bidirectional I/O pin 23 |
| Pin 39 | VCC — 5 V supply voltage |
| Pin 40 | GND — Ground |
Typical Applications
EP910PI-40 is suitable for 6 applications: Legacy TTL/CMOS Glue Logic Replacement, Microprocessor Address Decoding, Bus Interface and Arbiter Logic, Industrial State-Machine Controllers, Bipolar PAL Replacement and Migration, Legacy Industrial and Avionics Maintenance.
Legacy TTL/CMOS Glue Logic Replacement
The EP910PI-40 replaces multiple discrete 74LS/74HC TTL logic gates with a single 24-macrocell EPLD. Its 43 ns propagation delay and 25 MHz maximum clock frequency are well-matched to legacy 8-bit and 16-bit microprocessor bus timing. Engineers typically use the EP910PI-40 to consolidate address decoding, chip-select generation, and interrupt priority logic that previously required 4-6 discrete PALs or TTL packages. The 5 V supply matches existing TTL rails, and the PDIP-40 package suits through-hole legacy backplanes. According to the Altera EP910 datasheet, programming with A+PLUS or MAX+PLUS tools preserves the design as a non-volatile source file, providing better design security than discrete logic.
Recommended
Microprocessor Address Decoding
The EP910PI-40 is widely used for address decoding in 8086, 68000, and Z80 microprocessor systems, where its 12 dedicated inputs and 24 I/O lines can implement 16-20 address-line decoders with multiple chip-select outputs. Its 43 ns tPD is well within the access-time budget of legacy SRAM and peripheral chips (typically 70-200 ns). The PAL-type macrocell architecture provides deterministic combinatorial outputs with user-configurable polarity, ideal for active-low chip-select generation. According to the Altera EP910 datasheet, the device supports both combinatorial and registered decode schemes, allowing banking logic and memory-mapping functions in a single chip.
Recommended
Bus Interface and Arbiter Logic
The EP910PI-40 implements multi-master bus arbitration for legacy ISA, VME, and proprietary backplane designs. Its 24 macrocells can encode state machines for bus grant, request, and lock signals, while the 12 dedicated inputs accept bus request lines and address bus bits. The 43 ns propagation delay supports bus arbitration at 8-10 MHz, suitable for industrial automation and process-control backplanes. According to the Altera EP910 datasheet, the registered macrocell outputs and three-state control enable proper bus-driver handshake, replacing discrete 74LS244/245 transceivers plus 74LS139/138 decoders with a single reprogrammable device.
Recommended
Industrial State-Machine Controllers
The EP910PI-40 is used in industrial controllers to implement finite state machines for sequencing, motor control, and process automation. Its 24 registered macrocells can encode state machines with 16-24 states, sufficient for most discrete manufacturing sequences. The 5 V supply tolerance (4.75 V to 5.25 V) and 0C to +70C commercial temperature range suit factory-floor environments with regulated power. According to the Altera EP910 datasheet, the UV-erasable CMOS technology provides 20+ years of data retention, ideal for long-lifecycle industrial equipment that must remain serviceable for decades without firmware updates.
Recommended
Bipolar PAL Replacement and Migration
The EP910PI-40 is a popular CMOS, reprogrammable replacement for legacy bipolar PALs such as PAL16L8, PAL20L8, and PAL22V10. Its 24 macrocells and 24 I/O lines can absorb the logic of 3-5 bipolar PALs into a single package while reducing power consumption by 80-90% (CMOS vs bipolar). The same 5 V supply simplifies retrofit designs. According to the Altera EP910 datasheet, JEDEC fuse-map compatibility allows existing PAL designs to be recompiled into the EP910 with minimal redesign. Rochester Electronics supplies long-term EP910PI-40 stock specifically for migration projects where field-deployed bipolar PALs must be replaced without PCB changes.
Recommended
Legacy Industrial and Avionics Maintenance
The EP910PI-40 remains in active deployment in long-lifecycle systems including 1990s-era avionics, military radio equipment, industrial CNC controllers, and medical imaging devices. Its continued availability through Rochester Electronics ensures these systems can be maintained for decades beyond the original Altera production lifecycle. According to the Rochester Electronics EP910PI-40 product listing, the part is specified as a long-term support device with original Altera silicon and full datasheet traceability. Design teams maintaining such systems should stock lifetime quantities during the current last-time-buy window.
Recommended
Recommended Products Summary
Engineering reference data for EP910PI-40 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EP910PI-35 | EP910PI-30 | EP910PI-25 | EP910PC-30 | EP910PC-25 | EP910PC-20 |
|---|---|---|---|---|---|---|---|
| Brand | Altera | Altera | Altera | Altera | Altera | Altera | Altera |
| Package | PDIP-40 | PDIP-40 - same | PDIP-40 - same | PDIP-40 - same | PDIP-40 - same | PDIP-40 - same | PDIP-40 - same |
| Propagation Delay (tPD) | 43 ns | 35 ns (-19%) | 30 ns (-30%) | 25 ns (-42%) | 30 ns (-30%) | 25 ns (-42%) | 20 ns (-53%) |
| Number of Macrocells | 24 | 24 | 24 | 24 | 24 | 24 | 24 |
| Supply Voltage | 5 V (4.75-5.25 V) | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V |
| Architecture | PAL-type macrocell, CMOS | PAL-type macrocell, CMOS | PAL-type macrocell, CMOS | PAL-type macrocell, CMOS | PAL-type macrocell, CMOS | PAL-type macrocell, CMOS | PAL-type macrocell, CMOS |
| Process Technology | CMOS UV-erasable | CMOS UV-erasable | CMOS UV-erasable | CMOS UV-erasable | CMOS UV-erasable | CMOS UV-erasable | CMOS UV-erasable |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C | 0C to +70C | 0C to +70C | 0C to +70C | 0C to +70C | 0C to +70C |
| Lifecycle Status (as of 2026) | Last-time-buy (Rochester long-term supply) | Last-time-buy | Last-time-buy | Last-time-buy | Last-time-buy | Last-time-buy | Last-time-buy |
Key Differentiators
- Slowest speed grade - lowest cost in the EP910 family (vs EP910PI-30)
- Through-hole PDIP-40 for legacy and prototype designs (vs EP910LC-30 (PLCC-44 surface-mount))
- PI suffix indicates industrial PDIP package (vs EP910PC-30 (PC suffix = commercial plastic DIP))
- Long-term availability through Rochester Electronics (vs Other Classic EPLDs without authorized long-term supply)
Design Notes
Estimated: The EP910PI-40 consumes approximately 100-200 mW active and 50-100 mW standby at 5 V depending on logic utilization and clock frequency. Per the Altera EP910 datasheet, ICC is a function of switching activity; designers should budget 5 V supply decoupling with 0.1 uF ceramic capacitors at each VCC pin (pin 39) and a 10 uF bulk tantalum near the package. In battery-backed or power-sensitive applications, the EP910PI-40's CMOS design offers an order-of-magnitude lower power than bipolar PALs of equivalent capacity.
Do not attempt to program the EP910PI-40 with modern Intel Quartus software - it does not support Classic EPLD families. Use only legacy A+PLUS II, MAX+PLUS II baseline, or equivalent third-party tools (such as those supporting JEDEC fuse files). Additionally, the EP910PI-40 requires a UV eraser for clearing (typically 20-30 minutes under a 12,000 uW/cm2 UV lamp), unlike modern EEPROM/flash-based CPLDs. Designers should retain at least one legacy programmer in-house for field serviceability.
Place the EP910PI-40's VCC pin (pin 39) decoupling capacitor within 5 mm of the package pin with a wide ground return path. The 12 dedicated inputs (pins 13-24) should be kept short to minimize noise pickup, especially when used as clock inputs (CLK1/CLK2 on pins 25/26). The 24 bidirectional I/O pins (pins 1-12 and 27-38) benefit from series damping resistors (22-33 ohm) when driving long PCB traces to suppress transmission-line ringing. The PDIP-40 footprint allows easy socket-mounting for development and rework.
Estimated: As of 2026-09-10, the EP910PI-40 is in last-time-buy status with Rochester Electronics as the authorized long-term supply partner. Customers should evaluate lifetime-need quantities and place orders within the current last-time-buy window. For new designs, consider migration to the Altera/Intel MAX V CPLD family (e.g., 5M40ZE64) which provides more macrocells, faster timing, lower power, and modern USB-based programming, although a PCB redesign is required for the different TQFP/QFN package.
Compliance Information
RoHS, REACH, lead-free, and halogen-free status not explicitly stated in verified distributor data for the EP910PI-40. The part was originally designed before RoHS took effect; Rochester Electronics may offer RoHS-compliant variants - contact Rochester directly for confirmation. AEC-Q100 not applicable (industrial/legacy part, not automotive). Conflict minerals compliance status not reported in verified data.
