EPC160C100 vs EPC160I100 Comparison
Detailed side-by-side comparison of EPC160C100 by Altera and EPC160I100 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC160C100
EPC160C100 - Altera Enhanced Configuration Device | Intel FPGA
EPC160C100 ObsoleteAltera
EPC160I100
EPC160I100 - Altera Enhanced Configuration Device, QFP-100 | Intel FPGA
EPC160I100 ObsoleteSpecification Comparison
| Parameter | EPC160C100 | EPC160I100 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.20 | $15.95 |
| Device Type | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs | Enhanced Configuration Device (EPC) |
| Supported FPGA Families | Altera APEX, Cyclone, Stratix, and other SRAM-based LUT devices | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 10KE |
| Configuration Density | 160 Mbit equivalent tier | β |
| Operating Voltage (Core) | 3.3 V | β |
| Programming Interface | JTAG (IEEE 1149.1) in-system programmable | β |
| Configuration Interface | Serial / Parallel, Altera nCONFIG/nSTATUS/CONF_DONE protocol | Passive serial, parallel byte-wide |
| Package | PQFP-100 | QFP-100 (14x14 mm) |
| Pin Count | 100 | β |
| Mounting Type | Surface Mount | Surface Mount |
| Cascade Support | Yes (nCASC pin for multi-FPGA daisy chain) | β |
| Memory Technology | Flash-based non-volatile configuration memory | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Manufacturer | β | Altera (Intel Programmable Solutions Group) |
| Configuration Memory Size | β | 1.6 Mbit |
| Supply Voltage (VCC) | β | 3.3 V |
| I/O Tolerance | β | 5.0 V tolerant |
| In-System Programming | β | JTAG (IEEE Std 1149.1) |
| Program/Erase Cycles | β | 10,000 cycles per sector |
| Sector Size | β | 32 KB |