EPC16UC88AA vs EPC16UC88 Comparison
Detailed side-by-side comparison of EPC16UC88AA by Altera and EPC16UC88 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC16UC88AA
EPC16UC88AA - 16Mb In-System Programmable Config PROM | Altera
EPC16UC88AA ObsoleteSpecification Comparison
| Parameter | EPC16UC88AA | EPC16UC88 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Unknown |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $20.45 | $0.00 |
| Programmable Type | In System Programmable | β |
| Memory Size | 16Mb (16,777,216 bits) | β |
| Memory Type | EEPROM / Flash-based non-volatile | β |
| On-Chip Decompression | Yes (~35% bitstream compression) | β |
| Package / Case | 88-UBGA (11x8 mm) | β |
| Packaging | Tray | β |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | β |
| Interface | Serial + JTAG ISP | β |
| Configuration Interface | DCLK / DATA / nCONFIG / nSTATUS handshake to target FPGA | β |
| Cascade Support | Up to 8 devices in series | β |
| Operating Temperature | 0 C to 70 C | [DATA_NEEDED: operating temperature] |
| Lead Free | Yes (per DigiKey listing) | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Target FPGAs | Altera FLEX 10K, APEX 20K, ACEX 1K and compatible families | β |
| Mounting Type | Surface Mount | Surface mount |
| Device Type | β | In-system programmable configuration PROM for FPGAs |
| Configuration Memory Capacity | β | 16 Mb |
| Supply Voltage | β | 3.3 V core and I/O |
| Package | β | 88-UBGA (11x8) |
| Package Family | β | UBGA |
| In-System Programmability | β | IEEE Std. 1532 compatible |
| Programming Language Support | β | Jam Standard Test and Programming Language (STAPL) |
| JTAG Boundary Scan | β | Supported |
| nINIT_CONF Function | β | Allows private JTAG instruction to start FPGA configuration |
| Configuration Architecture | β | Configuration controller and flash memory |
| FPGA Configuration Use | β | Automatic configuration after power-up or system initialization |
| Data Output | β | Configuration data output controlled by OE and nCS |
| Output Control | β | OE and nCS control tri-state buffer and address counter |
| Package Dimensions | β | 11 mm x 8 mm |
| REACH Status | β | [DATA_NEEDED: REACH status] |
| Output Current | β | [DATA_NEEDED: output current] |
| Configuration Frequency | β | [DATA_NEEDED: configuration frequency] |
| AEC-Q100 Qualification | β | [DATA_NEEDED: AEC-Q100 qualification] |