EPC1LC20 vs EPC1L20 Comparison
Detailed side-by-side comparison of EPC1LC20 by Intel and EPC1L20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1LC20 | EPC1L20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.95 | $3.75 |
| Memory Type | Non-volatile configuration memory (Flash/EPROM) | OTP Configuration PROM (Flash) |
| Memory Capacity | 1 Mbit (1,048,576 bits) | β |
| Interface Type | Serial configuration interface | β |
| Maximum DCLK Frequency | 8 MHz | β |
| Supply Voltage | 3.3 V or 5.0 V | 3.3 V (typical) |
| In-System Programmability | Yes (IEEE 1149.1 / JTAG) | β |
| Programmable Voltage | 5.0 V and 3.3 V ISP | β |
| Configuration Mode | Serial, multi-device daisy-chain capable | β |
| Package | 20-pin PLCC (J-leaded, surface mount) | 20-pin PLCC (9x9 mm) |
| Pin Count | 20 | β |
| Mounting Type | Surface Mount | Through-Hole / Socket |
| Operating Temperature | [DATA_NEEDED: Operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Compatible FPGA Families | ACEX 1K, APEX 20K, FLEX 10K, Cyclone, Mercury | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| JTAG Pins | TCK, TMS, TDI, TDO | β |
| Memory Size | β | 1 Mbit |
| Configuration Clock (max) | β | 8 MHz |
| Flash Access Time | β | 90 ns (approx.) |
| Max Read Bandwidth | β | 160 Mbps (16-bit DQ bus) |
| Interface | β | Serial / FPP configuration + JTAG (IEEE 1149.1) |
| Programmability | β | One-Time Programmable (OTP) |
| JTAG / ISP Support | β | Yes (IEEE 1149.1) |
| Compatible FPGA Series | β | Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |