EPC1LC20C vs EPC1213LC20 Comparison
Detailed side-by-side comparison of EPC1LC20C by Altera and EPC1213LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1LC20C | EPC1213LC20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | EEPROM |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.40 | $7.40 |
| Memory Type | Serial Configuration Flash | OTP Configuration PROM (Flash-based) |
| Memory Size | 1 Mbit (1,048,576 bits) | 212 Kbit |
| Configuration Clock (DCLK) | 8 MHz maximum | β |
| Interface | Serial (DATA/DCLK) + JTAG (IEEE 1149.1) | Serial (Altera FPGA configuration protocol) |
| Supply Voltage | 3.3 V or 5.0 V | β |
| Programmability | In-system via JTAG | One-Time Programmable (OTP) via IEEE 1149.1 JTAG |
| Cascading Support | Yes (nCS, CS pins) | β |
| Package | 20-pin LCC (Leadless Chip Carrier) | 20-PLCC (J-lead, 9x9 mm) |
| Mounting Type | Surface Mount (ceramic) | Surface Mount |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (Commercial) |
| Compatible FPGA Families | FLEX 10K, ACEX 1K, APEX 20K | β |
| JTAG Pins | TCK, TMS, TDI, TDO | β |
| Configuration Mode | Slave-serial (FPGA-master) | β |
| MSL Level | MSL3 (ceramic, floor life 168 hours) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Maximum Configuration Clock | β | 6 MHz |
| Supply Voltage (Core) | β | 5.0 V |
| I/O Voltage Tolerance | β | 3.3 V / 5.0 V |
| In-System Programmability | β | Yes (5.0 V and 3.3 V ISP) |
| Supported FPGA Families | β | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Compression Support | β | Yes (FPGA decompresses bitstream during load) |
| Package Code | β | QCCJ |