EPC1LC20CEC vs EPC2LC20 Comparison
Detailed side-by-side comparison of EPC1LC20CEC by Altera and EPC2LC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1LC20CEC | EPC2LC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.20 | $7.20 |
| Memory Type | OTP Configuration PROM (anti-fuse) | Non-volatile configuration PROM |
| Memory Size | 1 Mbit (1,048,576 bits) | 1.6 Mbit |
| Configuration Interface | Serial (4-pin: DATA, DCLK, nCS, OE) | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Maximum Clock Frequency | 8 MHz | β |
| Programming Mode | One-Time Programmable (OTP) | β |
| Package | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Operating Temperature | 0Β°C to +70Β°C | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Supply Voltage | [DATA_NEEDED: VCC range] | β |
| Configuration Mode | Altera serial slave/master | β |
| Compatible FPGA Families | ACEX 1K, APEX 20K, FLEX 6000, FLEX 8000, FLEX 10K | β |
| Read Endurance | Unlimited | β |
| Program Endurance | 1 cycle (OTP) | β |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount |
| RoHS Status | Non-compliant (legacy PLCC package) | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free | No (contains lead) | β |
| Programming Interface | β | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | β | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | β | 5.0 V or 3.3 V |
| Supported FPGA Families | β | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | β | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Lead-Free Version | β | EPC2LC20N available as lead-free equivalent |
| Programming Support | β | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | β | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |