EPC20LC20U vs EPC16UC88 Comparison
Detailed side-by-side comparison of EPC20LC20U by Intel and EPC16UC88 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC20LC20U | EPC16UC88 |
|---|---|---|
| Brand | Intel | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Unknown |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.20 | $0.00 |
| Manufacturer | Altera Corporation (now Intel) | β |
| Function | FPGA Configuration Device (Serial Configuration PROM) | β |
| Memory Type | Non-volatile configuration memory | β |
| Configuration Interface | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) | β |
| Operating Voltage | 5.0 V (typical) | β |
| Absolute Maximum DC Input | -0.3 V to 7.0 V | β |
| Transient Input Tolerance | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) | β |
| Package Type | PLCC-20 (J-lead, plastic leaded chip carrier) | β |
| Pin Count | 20 | β |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface mount |
| Compatible FPGA Families | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone | β |
| In-System Programming | Supported via JTAG / Quartus programmer | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Operating Temperature Range | [DATA_NEEDED: industrial/commercial grade] | β |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | β |
| Lifecycle Status | Obsolete / Last-time-buy in distribution | β |
| Device Type | β | In-system programmable configuration PROM for FPGAs |
| Configuration Memory Capacity | β | 16 Mb |
| Supply Voltage | β | 3.3 V core and I/O |
| Package | β | 88-UBGA (11x8) |
| Package Family | β | UBGA |
| In-System Programmability | β | IEEE Std. 1532 compatible |
| Programming Language Support | β | Jam Standard Test and Programming Language (STAPL) |
| JTAG Boundary Scan | β | Supported |
| nINIT_CONF Function | β | Allows private JTAG instruction to start FPGA configuration |
| Configuration Architecture | β | Configuration controller and flash memory |
| FPGA Configuration Use | β | Automatic configuration after power-up or system initialization |
| Data Output | β | Configuration data output controlled by OE and nCS |
| Output Control | β | OE and nCS control tri-state buffer and address counter |
| Package Dimensions | β | 11 mm x 8 mm |
| REACH Status | β | [DATA_NEEDED: REACH status] |
| Operating Temperature | β | [DATA_NEEDED: operating temperature] |
| Output Current | β | [DATA_NEEDED: output current] |
| Configuration Frequency | β | [DATA_NEEDED: configuration frequency] |
| AEC-Q100 Qualification | β | [DATA_NEEDED: AEC-Q100 qualification] |