EPC20LI20N vs EPC2LI20N Comparison
Detailed side-by-side comparison of EPC20LI20N by Intel and EPC2LI20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC20LI20N | EPC2LI20N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.50 | $5.10 |
| Memory Type | EPROM (UV-erasable, in-system programmable) | Non-volatile configuration PROM (Flash) |
| Memory Size | 1.6 Mbit (65,536 x 1-bit words, approx. 200 Kbyte) | 1.6 Mbit |
| Interface | Serial (4-pin Altera Passive Serial: DCLK, DATA0, nCONFIG, nSTATUS) | β |
| Supply Voltage | 3.3 V (5.0 V compatible variant in same family) | β |
| Configuration Clock | Up to 10 MHz | β |
| Target FPGA Families | APEX II, APEX 20K/KC/KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | β |
| Package | 20-pin PLCC (9x9 mm, JEDEC MS-018) | β |
| Mounting Type | Surface Mount (PLCC socket or direct solder) | Surface Mount |
| Programming Interface | IEEE 1532 / JTAG (in-system) | β |
| Operating Temperature | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Standby Current | [DATA_NEEDED: standby current uA] | β |
| Active Configuration Current | [DATA_NEEDED: ICC active mA] | β |
| Programming Voltage | [DATA_NEEDED: VPP] | β |
| Programming Cycles | [DATA_NEEDED: endurance cycles] | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status] | β |
| Multi-Device Daisy-Chain | Supported via nCASC pin | β |
| Programmable Type | β | In System Programmable (ISP via JTAG) |
| Configuration Mode | β | Serial |
| Maximum Configuration Frequency | β | 10 MHz |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | β | 4.5 V to 5.5 V |
| Package / Case | β | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | β | Tube |
| Supported FPGA Series | β | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | β | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | β | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |