EPC22LC20 vs EPC2L1696-10F Comparison
Detailed side-by-side comparison of EPC22LC20 by Intel and EPC2L1696-10F by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC2L1696-10F
EPC2L1696-10F Altera Configuration Device for SRAM FPGAs | 1696-LUT
EPC2L1696-10F NrndSpecification Comparison
| Parameter | EPC22LC20 | EPC2L1696-10F |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.10 | $0.00 |
| Function | In-System Programmable Configuration PROM for SRAM-based FPGAs | β |
| Memory Size | 1.6 Mbit | β |
| Programmable Type | In System Programmable (IEEE 1532 / Jam STAPL) | β |
| Supply Voltage - Low Range | 3.0 V to 3.6 V | β |
| Supply Voltage - High Range | 4.75 V to 5.25 V | β |
| Supported FPGA Families | ACEX 1K, APEX II, APEX 20K, FLEX 10K | β |
| Configuration Interface | Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE) | 5-pin Altera serial (nCS, DCLK, DATA, OE, nINIT_CONF) |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | β |
| Package / Case | 20-LCC (J-Lead, 9 x 9 mm) | β |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount |
| Packaging | Tube | β |
| Operating Temperature | 0 C to +70 C (commercial) | 0C to +70C (commercial) |
| Minimum DC Input Voltage | -0.3 V | β |
| Input Overshoot Tolerance | 7.0 V for <100 mA, <20 ns no-load | β |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns no-load | β |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status not in verified data] | β |
| Device Type | β | Configuration EPROM for SRAM-based LUT FPGAs |
| Supported Logic Density | β | 1696 LUTs |
| Memory Technology | β | CMOS EEPROM |
| Supply Voltage (VCC) | β | 3.3 V |
| Access Time | β | 10 ns (speed grade -10) |
| Maximum DCLK Frequency | β | [DATA_NEEDED: DCLK max frequency] |
| Program / Erase Cycles | β | >= 100,000 cycles |
| Data Retention | β | [DATA_NEEDED: data retention years] |
| In-System Programming | β | Yes (4-wire JTAG-style interface) |
| Package | β | 20-pin PLCC |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |