EPC2L20N vs EPC2L20U-HAF480119C Comparison
Detailed side-by-side comparison of EPC2L20N by Altera and EPC2L20U-HAF480119C by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPC2L20U-HAF480119C
EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel
EPC2L20U-HAF480119C β Last Time BuySpecification Comparison
| Parameter | EPC2L20N | EPC2L20U-HAF480119C |
|---|---|---|
| Brand | Altera | Intel |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.20 | $10.75 |
| Function | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs | β |
| Memory Size | 1.6 Mbit | 1.6 Mb |
| Programmable Type | In System Programmable (ISP) | β |
| Supply Voltage - VCCINT/VCCIO | 3.0 V to 3.6 V or 4.5 V to 5.5 V | β |
| Package / Case | 20-LCC (J-Lead), PLCC-20 | β |
| Packaging | Tube | β |
| Operating Temperature | 0C to +70C (commercial) | β |
| Supported FPGA Families | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) | β |
| Configuration Interface | Serial (Altera FPP / PS configuration scheme) | β |
| Cascade Support | Yes (multi-PROM chain via CE control) | Yes (multi-PROM chains for larger FPGAs) |
| Programming Method | In-system via 4-wire ISP / JTAG-style | β |
| Mounting Type | Surface Mount (J-Lead PLCC) | Surface Mount / Socketed |
| Pin Count | 20 | β |
| Lead Finish | Matte Tin (Pb-free) | β |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Memory Type | β | Configuration PROM (non-volatile) |
| Target Device | β | SRAM-based LUT FPGAs (Cyclone, Stratix, APEX families) |
| Core Supply Voltage | β | 3.3 V |
| I/O Tolerance | β | 5 V tolerant |
| Configuration Modes | β | Serial (1-bit), Parallel (8-bit FPP), JTAG |
| JTAG Support | β | Yes (IEEE 1149.1 boundary-scan) |
| Programmability | β | In-system programmable via JTAG |
| Configuration Clock Range | β | 10 MHz to 40 MHz |
| Bitstream Compression Support | β | Yes (Cyclone/Stratix compressed bitstreams) |
| Package | β | PLCC-20 |
| Operating Temperature Range | β | [DATA_NEEDED: operating temperature range] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |