EPC2LC20N-W vs EPC2CC20N Comparison

Detailed side-by-side comparison of EPC2LC20N-W by Altera and EPC2CC20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2LC20N-W EPC2CC20N
Brand Altera Altera
Category Memory ICs FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $6.45 $10.85
Memory Type EPROM (UV-erasable, ISP) β€”
Memory Size 1.6 Mbit β€”
Programmable Type In System Programmable β€”
Configuration Interface Serial (DATA, DCLK, OE, nCS) 16-bit parallel (FPP) / Passive Serial (PS)
Internal Oscillator Frequency 66.7 MHz β€”
Supply Voltage (VCC) 3.0 V to 3.6 V, 4.75 V to 5.25 V 3.3 V
ISP Interface JTAG (IEEE 1149.1) β€”
Supported FPGA Families APEX 20K, ACEX 1K, Mercury, FLEX 10K, Stratix, Cyclone β€”
Package 20-LCC (J-Lead) PLCC-20 PLCC-20
Mounting Type Surface Mount Surface Mount (PLCC-20 socket compatible)
Packaging Tape & Reel (-W suffix) β€”
Cascade Support Yes (with other EPC2 devices) β€”
Pin Count 20 β€”
Lead-Free / RoHS [DATA_NEEDED: RoHS status for -W variant] β€”
Operating Temperature [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial/commercial temp range]
Function β€” Configuration device for SRAM-based LUT FPGAs
Density β€” [DATA_NEEDED: bitstream density in bits]
Programming Interface β€” JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster
In-System Programmable β€” Yes
Error Detection β€” 16-bit CRC on configuration frames
Configuration Modes Supported β€” FPP and PS (depends on host FPGA)
Cascadable β€” Yes (multiple EPC2 devices for larger bitstreams)
Open-Drain Status Pin β€” Yes (CONF_DONE / nSTATUS compatible)
MSL Level β€” [DATA_NEEDED: MSL rating]
RoHS Status β€” [DATA_NEEDED: RoHS compliance status]

Datasheets & Resources

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