EPC2LC20N vs EPC2LC20-T Comparison

Detailed side-by-side comparison of EPC2LC20N by Intel and EPC2LC20-T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPC2LC20-T

EPC2LC20-T - 1.6Mb FPGA Config PROM PLCC-20 | Altera

EPC2LC20-T ⚠ Last Time Buy

Specification Comparison

Parameter EPC2LC20N EPC2LC20-T
Brand Intel Altera
Category Memory ICs Memory ICs
Lifecycle Status Nrnd Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $7.40 $7.40
Function In-System Programmable Configuration PROM for SRAM-based FPGAs β€”
Memory Size 1.6 Mbit 1.6 Mb
Memory Type Flash Configuration PROM (Flash)
Programmable Type In System Programmable (ISP) β€”
Supply Voltage VCCINT 3.0 V to 3.6 V β€”
Supply Voltage VCCIO 4.75 V to 5.25 V β€”
Configuration Clock Frequency 8 MHz (max) β€”
Interface Serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) β€”
JTAG Support IEEE 1149.1 / IEEE 1532 compliant β€”
Package 20-pin PLCC (J-Lead, 9x9 mm) 20-PLCC (9x9 mm)
Mounting Type Surface Mount Surface Mount
Packaging Tube β€”
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Supported FPGA Families Altera APEX, Cyclone, Stratix, ACEX, MAX 7000 ACEX, APEX, Cyclone, FLEX, MAX 7000A/B, MAX II, Mercury
RoHS Status [DATA_NEEDED: RoHS status] Compliant
Configuration Mode β€” Serial (PS mode), cascadable
Max Configuration Frequency β€” 10 MHz
Supply Voltage β€” 3.3 V (typical)
Programmability β€” In-System Programmable via JTAG
JTAG Interface β€” IEEE Std 1149.1-1990 compliant
Cascade Support β€” Yes (nCASC pin)
Packaging Suffix β€” -T = Tape and Reel
Lead-Free β€” Yes

Datasheets & Resources

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