EPC2LC20NU vs EPC2LC20ES Comparison
Detailed side-by-side comparison of EPC2LC20NU by Altera and EPC2LC20ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPC2LC20ES
EPC2LC20ES - 1.6Mb ISP Config PROM for FPGAs | Intel / Altera
EPC2LC20ES β ActiveSpecification Comparison
| Parameter | EPC2LC20NU | EPC2LC20ES |
|---|---|---|
| Brand | Altera | Intel |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.20 | $5.85 |
| Function | In-System Programmable Configuration PROM | β |
| Memory Density | 1.6 Mbit | β |
| FPGA Interface | Altera serial (4-pin: nCS, DCLK, DATA, nINIT_CONF) | β |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | β |
| I/O Tolerance | 5 V tolerant inputs (per datasheet, except JTAG pins) | β |
| Programming Method | In-system via IEEE 1149.1 JTAG | β |
| JTAG Support | Yes (IEEE Std 1149.1 boundary-scan compliant) | β |
| Cascade Support | Yes - daisy-chain for larger bitstreams | β |
| Minimum DC Input | -0.3 V (inputs may undershoot to -2.0 V for <20 ns) | β |
| Maximum Overshoot | 7.0 V for <100 mA and <20 ns | β |
| Package | 20-pin J-lead PLCC (9x9 mm) | 20-PLCC (J-lead, 9x9 mm) |
| Mounting Type | Surface Mount | Surface Mount / Through-Hole (PLCC socket) |
| Lead-Free / RoHS | Non-LEAD / non-RoHS (NU suffix = matte tin Sn finish, not Pb-free) | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Compatibility | Altera APEX 20K, APEX II, Mercury, FLEX 10K, ACEX 1K, Cyclone (legacy serial configuration) | β |
| Memory Type | β | Configuration PROM (Non-volatile) |
| Memory Size | β | 1.6 Mbit |
| Target Device | β | SRAM-based FPGAs and LUT devices |
| Interface | β | Serial (DCLK/DATA) with JTAG ISP |
| Operating Voltage | β | 3.3 V and 5.0 V tolerant |
| JTAG Standard | β | IEEE Std. 1149.1 compliant |
| In-System Programmability | β | Yes (via built-in JTAG) |
| Boundary-Scan Test (BST) | β | Built-in, IEEE 1149.1 compliant |
| Configuration Modes | β | Serial and parallel supported |
| Pin Count | β | 20 |
| RoHS Status | β | Compliant (ES suffix denotes lead-free industrial) |
| Programming Interface | β | JTAG (4-wire: TDI/TDO/TMS/TCK) |
| Manufacturer | β | Intel (formerly Altera) |