EPC2LC20V vs EPC1LC20 Comparison

Detailed side-by-side comparison of EPC2LC20V by Intel and EPC1LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2LC20V EPC1LC20
Brand Intel Intel
Category FPGA & CPLD Memory ICs
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $7.95
Product Type Flash Configuration Device (FPGA configuration PROM) β€”
Memory Size 1.6 Mb (1,678,336 bits) β€”
Configuration Interface Serial (Passive Serial) or 8-bit parallel β€”
Maximum Configuration Clock 10 MHz β€”
Operating Voltage (VCC) 3.0 V to 3.6 V (3.3 V typ.) β€”
Program/Erase Cycles 100,000 cycles minimum β€”
Data Retention 20 years minimum β€”
JTAG Support IEEE 1149.1 Boundary Scan, in-system programmable β€”
Package PLCC-20 (JEDEC MO-047) 20-pin PLCC (J-leaded, surface mount)
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: Operating temperature range]
Storage Temperature -65C to +150C β€”
Lead-Free / RoHS Lead-free (V suffix), RoHS compliant β€”
Compatible FPGAs Cyclone, Stratix, APEX 20K, ACEX 1K, FLEX 10K, FLEX 8000 β€”
On-chip Oscillator Yes (generates DCLK) β€”
Configuration Time (typical) Depends on FPGA bitstream length and clock mode β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Memory Type β€” Non-volatile configuration memory (Flash/EPROM)
Memory Capacity β€” 1 Mbit (1,048,576 bits)
Interface Type β€” Serial configuration interface
Maximum DCLK Frequency β€” 8 MHz
Supply Voltage β€” 3.3 V or 5.0 V
In-System Programmability β€” Yes (IEEE 1149.1 / JTAG)
Programmable Voltage β€” 5.0 V and 3.3 V ISP
Configuration Mode β€” Serial, multi-device daisy-chain capable
Pin Count β€” 20
Mounting Type β€” Surface Mount
Compatible FPGA Families β€” ACEX 1K, APEX 20K, FLEX 10K, Cyclone, Mercury
RoHS Status β€” [DATA_NEEDED: RoHS status]
JTAG Pins β€” TCK, TMS, TDI, TDO

Datasheets & Resources

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