EPC2LI20J vs EPC2LC20 Comparison
Detailed side-by-side comparison of EPC2LI20J by Altera and EPC2LC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2LI20J | EPC2LC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $7.20 |
| Memory Type | In-System Programmable Configuration PROM (flash) | Non-volatile configuration PROM |
| Memory Size | 1,695,680 bits (1.6Mb) | 1.6 Mbit |
| Organization | 65,536 x 1-bit (serial interface) | β |
| Interface | Altera 4-pin serial configuration (DATA, DCLK, nCS, nCONFIG) | β |
| Target FPGAs | APEX II, APEX 20K/20KC/20KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | β |
| I/O Voltage (VCCIO) | 5.0 V or 3.3 V tolerant | β |
| ISP Programming Interface | JTAG (IEEE 1149.1) | β |
| Cascade Support | Yes (multi-device configuration chain) | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Internal Oscillator | Yes (configures without external clock source) | β |
| Package | 20-pin PLCC with J-leads (JEDEC MS-018) | 20-pin PLCC (J-lead, 9x9 mm) |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Programming Cycles | [DATA_NEEDED: minimum endurance cycles] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Configuration Clock (DCLK) | Up to 33 MHz | β |
| Configuration Interface | β | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | β | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | β | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | β | 5.0 V or 3.3 V |
| Supported FPGA Families | β | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Mounting Type | β | Surface Mount |
| Lead-Free Version | β | EPC2LC20N available as lead-free equivalent |
| Programming Support | β | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | β | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |