EPC2LS20U vs EPC2LI20 Comparison
Detailed side-by-side comparison of EPC2LS20U by Altera and EPC2LI20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2LS20U | EPC2LI20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.25 | $5.95 |
| Product Type | In-System Programmable Configuration PROM | β |
| Memory Density | 1.6 Mbit | β |
| Operating Voltage (VCC) | 3.3 V | β |
| Interface | Altera serial configuration / JTAG | β |
| Programming Method | In-System Programmable (ISP) via JTAG | β |
| Package | 20-PLCC (J-lead, 9x9 mm) | β |
| Lead-Free / RoHS | Yes (per "U" suffix) | β |
| Operating Temperature | [DATA_NEEDED: Operating Temperature] | -40 C to +85 C (Industrial) |
| Supported FPGA Families | Cyclone I/II, Stratix/II, APEX-II, ACEX-1K, FLEX-10K, FLEX-6000, MAX-7000 | β |
| Configuration Modes | PS (Passive Serial), AS, FPP | β |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | β |
| Done Pin | Yes (open-drain programmable polarity) | β |
| nSTATUS Pin | Yes (open-drain error flag) | β |
| nCONFIG Pin | Yes (reset/reconfiguration input) | β |
| DCLK Output | Yes (configuration clock to FPGA) | β |
| MSL Level | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL level] |
| Compliance | RoHS (Pb-free per U suffix) | β |
| Memory Size | β | 1.6 Mb (1,572,864 bits) |
| Memory Type | β | Flash (in-system programmable) |
| Programmable Type | β | In System Programmable (ISP) |
| Function | β | Configuration PROM for SRAM-based FPGAs |
| Supply Voltage - Operating | β | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Package / Case | β | 20-PLCC (J-lead, 9x9 mm) |
| Mounting Type | β | Surface Mount (PLCC socket-compatible) |
| Configuration Interface | β | Serial or Byte-wide (parallel) |
| Decompression | β | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | β | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | β | Yes (daisy-chain configuration) |
| User-Accessible Memory | β | Yes (unused flash available to user logic) |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |