EPC2T132N vs EPC2-TI32N Comparison
Detailed side-by-side comparison of EPC2T132N by Altera and EPC2-TI32N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2T132N | EPC2-TI32N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.80 | $11.50 |
| Memory Type | Flash (NOR, serial configuration) | β |
| Memory Capacity | 1.6 Mbit (2 Mbit raw, 1.6 Mbit usable) | β |
| Serial Clock Frequency | 10 MHz maximum | β |
| Interface | Altera serial configuration (4-wire JTAG for ISP) | β |
| Supply Voltage | 3.0 V to 3.6 V | β |
| Operating Temperature | -40C to +85C (industrial) | -40 C to +85 C |
| Package | TQFP-32 (T132) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Program/Erase Endurance | 100,000 cycles per sector | β |
| Data Retention | 20 years minimum | β |
| In-System Programmable | Yes (IEEE 1149.1 JTAG) | β |
| Configuration Compatibility | APEX II, APEX 20K, ACEX 1K, FLEX 10K/10KE/6000, Cyclone, Stratix, Mercury | β |
| Multi-Device Daisy Chain | Yes (supported) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Memory Size | β | 1.6 Mb |
| Memory Organization | β | 1,695,680 x 1 |
| Programmable Type | β | In System Programmable |
| Interface Type | β | Serial (for SRAM-based LUT FPGAs) |
| Programming Interface | β | IEEE 1532-compliant JTAG |
| Supply Voltage - VCCINT | β | 3.0 V to 3.6 V |
| Supply Voltage - VCCIO | β | 4.5 V to 5.5 V |
| Package / Case | β | 32-TQFP (7 mm x 7 mm) |
| Terminal Pitch | β | 0.8 mm |
| Supplier Device Package | β | 32-TQFP |
| Packaging | β | Tray |
| Technology | β | Flash + CMOS configuration logic |
| Configuration Clock | β | Dedicated DCLK output for FPGA |