EPC2TI32N vs EPC2TC32N Comparison
Detailed side-by-side comparison of EPC2TI32N by Altera and EPC2TC32N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC2TI32N
EPC2TI32N - 1.6Mb ISP Configuration PROM for FPGA | Altera / Intel
EPC2TI32N ObsoleteSpecification Comparison
| Parameter | EPC2TI32N | EPC2TC32N |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $9.20 |
| Memory Type | In-System Programmable Configuration PROM (Flash) | Flash Configuration PROM |
| Memory Size | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (ISP via JTAG) | In System Programmable (ISP) |
| Interface Type | Parallel configuration data output + JTAG (IEEE 1149.1) ISP | β |
| Supply Voltage - 3.3V Mode | 3.0 V to 3.6 V | β |
| Supply Voltage - 5V Mode | 4.5 V to 5.5 V | β |
| Operating Temperature | -40C to +85C | 0 Β°C to +70 Β°C (Commercial) |
| Package / Case | 32-TQFP (7x7 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Packaging | Tray | β |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, Mercury, FLEX 10K | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| JTAG Interface | Yes (IEEE 1149.1 compliant TAP for ISP) | β |
| Configuration Pins | nCONFIG, nSTATUS, CONF_DONE, DCLK, DATA[7:0] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead Free | [DATA_NEEDED: lead-free status] | β |
| Manufacturer | β | Altera (now Intel) |
| Interface | β | JTAG (IEEE 1149.1) + serial/parallel |
| Supply Voltage - VCCINT | β | 3.0 V to 3.6 V or 4.75 V to 5.25 V |
| Supply Voltage - VCCIO | β | 3.0 V to 3.6 V or 4.75 V to 5.25 V |
| Max Configuration Clock | β | 8 MHz |
| Package | β | 32-TQFP (7x7 mm) |
| Daisy-Chain Support | β | Yes (multi-FPGA cascade) |
| JTAG Compliance | β | IEEE 1149.1 |
| Configuration Mode | β | Serial (AS) or Parallel (PS/AP) |