EPF10K200SRC240-1 vs EPF10K200SRC240-3N Comparison

Detailed side-by-side comparison of EPF10K200SRC240-1 by Intel and EPF10K200SRC240-3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPF10K200SRC240-1

EPF10K200SRC240-1 - 200K Gate FLEX-10KS FPGA, 240-RQFP | Intel

EPF10K200SRC240-1 Nrnd
Intel
EPF10K200SRC240-3N

EPF10K200SRC240-3N - FLEX 10KE FPGA 200K Gates 9984 Cells | Intel

EPF10K200SRC240-3N Obsolete

Specification Comparison

Parameter EPF10K200SRC240-1 EPF10K200SRC240-3N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $112.00 $162.00
Manufacturer Intel (formerly Altera) β€”
Series FLEX-10KS β€”
Family FLEX 10K Embedded Programmable Logic FLEX 10KE
Device Type FPGA - Field Programmable Gate Array β€”
Number of Logic Elements 9984 β€”
Number of LABs (Logic Array Blocks) 1248 β€”
Number of EABs (Embedded Array Blocks) 24 β€”
Total EAB RAM Bits 40960 β€”
Total SRAM Bits 98304 β€”
Typical System Gates 200000 200,000
Maximum System Gates 513000 β€”
Number of I/O Pins 182 β€”
Supply Voltage - Core 5.0 V β€”
Supply Voltage - I/O 3.3 V / 5.0 V (multiVolt) β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature -40C to +85C (industrial) 0 Β°C to +70 Β°C (Commercial)
Package / Case 240-BFQFP Exposed Pad (RQFP-240) β€”
Supplier Device Package 240-RQFP (32x32 mm) β€”
Speed Grade -1 (fastest) -3 (commercial)
Programmability SRAM-based, in-system via JTAG β€”
JTAG (IEEE 1149.1) Yes β€”
RoHS Status [DATA_NEEDED: rohs status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] β€”
Logic Elements (LEs) β€” 9,984
Maximum Logic Elements β€” 9,984
Embedded Array Blocks (EABs) β€” 24
Maximum User RAM Bits β€” 98,304
Logic Array Blocks (LABs) β€” 1,248
User I/Os β€” 470 (effective); 182 user pins per RQFP-240 with the rest assigned to dedicated functions
Propagation Delay (tPD) β€” 0.40 ns
Internal Operating Frequency β€” 166.67 MHz
Process Technology β€” 0.22 Β΅m CMOS SRAM
Core Supply Voltage β€” 2.5 V
MultiVolt I/O Support β€” 2.5 V and 3.3 V interfaces
Package β€” 240-pin RQFP (Power QFP) with exposed pad, 34.6 x 34.6 mm, 0.5 mm pitch
JTAG Support β€” IEEE Std 1149.1 Boundary-Scan (contributes up to 31,250 gates of test logic)
Configuration Method β€” SRAM-based; requires external configuration device (e.g., EPC2) for power-up loading

Datasheets & Resources

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