EPF10K30ETI144-2N vs EPF10K30ETI144-3 Comparison
Detailed side-by-side comparison of EPF10K30ETI144-2N by Intel and EPF10K30ETI144-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPF10K30ETI144-2N
EPF10K30ETI144-2N - FLEX 10KE FPGA 30K Gates 144-TQFP | Intel
EPF10K30ETI144-2N β Last Time BuyAltera
EPF10K30ETI144-3
EPF10K30ETI144-3 - 30K FLEX-10KE FPGA 102 I/O | Intel / Altera
EPF10K30ETI144-3 ObsoleteSpecification Comparison
| Parameter | EPF10K30ETI144-2N | EPF10K30ETI144-3 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $23.40 | $29.80 |
| Family | FLEX 10KE | FLEX-10KE Embedded Programmable Logic Device |
| Series | FLEX 10KE | FLEX-10KE |
| Typical Gates | 30,000 | β |
| Logic Elements (LEs) | 1,728 | β |
| Logic Array Blocks (LABs) | 216 | 216 |
| Embedded Memory (EAB) | 24,576 bits | β |
| User I/O Pins | 102 | β |
| Core Voltage (VCCINT) | 2.5 V | β |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | β |
| Process Technology | 0.22 Β΅m CMOS | β |
| Maximum Internal Frequency | 200 MHz | β |
| Package | 144-pin TQFP (LQFP-144) | 144-LQFP (LFQFP) |
| Mounting Type | Surface Mount | Surface Mount (Gull Wing) |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial) | -40C to +85C (Industrial) |
| Speed Grade | -2 | β |
| Lead-Free (N suffix) | Yes | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-Compliant (Sn/Pb lead finish) |
| Logic Elements | β | 1728 |
| Embedded RAM | β | 24,576 bits |
| Embedded Array Blocks (EABs) | β | 6 |
| Maximum User I/O | β | 102 |
| Maximum Equivalent Gates | β | 119,000 |
| Pin-to-Pin Delay (Speed Grade) | β | 12.5 ns |
| Supply Voltage (Core) | β | 2.5 V / 3.3 V |
| I/O Voltage Tolerance | β | 5.0 V / 3.3 V / 2.5 V (multi-volt) |
| Package Height | β | 1.6 mm |
| Lead Finish | β | Tin/Lead (Sn/Pb) |
| Configuration Method | β | SRAM (volatile) + JTAG IEEE 1149.1 |