EPM240M100I5N vs EPM240GM100C5N Comparison
Detailed side-by-side comparison of EPM240M100I5N by Altera and EPM240GM100C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N β ActiveSpecification Comparison
| Parameter | EPM240M100I5N | EPM240GM100C5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.95 | $4.75 |
| Series | MAX II | β |
| Family | MAX II CPLD | MAX II G |
| Macro Cells | 192 | β |
| Logic Elements | 240 | 240 (192 macrocells) |
| Maximum Internal Frequency | 201.1 MHz | β |
| Propagation Delay (tPD) | 4.7 ns | β |
| On-die Non-volatile Memory | 8 Kbits | β |
| Process Technology | 0.18 Β΅m, 6-layer metal flash | CMOS, Flash-based |
| Core Voltage | 2.5 V / 3.3 V | β |
| I/O Bank Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| User I/O Pins | [DATA_NEEDED: user IO count for MBGA package] | β |
| Package | 100-MBGA (Micro FineLine BGA) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Operating Temperature | -40 Β°C to +100 Β°C (industrial) | -40 C to +125 C |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) - ISP |
| RoHS Status | Compliant | β |
| Lead-Free | Yes | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| User I/Os | β | 80 |
| Pin-to-Pin Delay (tPD) | β | 4.7 ns |
| Ball Pitch | β | 0.5 mm |
| Supply Voltage - Core | β | 3.3 V |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Configuration Memory | β | Non-volatile Flash |
| Lead Free / RoHS | β | Yes / Compliant |
| MSL Level | β | 3 |