EPM240ZM100C7N vs EPM240GM100C5N Comparison
Detailed side-by-side comparison of EPM240ZM100C7N by Altera and EPM240GM100C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N β ActiveSpecification Comparison
| Parameter | EPM240ZM100C7N | EPM240GM100C5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.10 | $4.75 |
| Family | MAX II Z | MAX II G |
| Series | MAX II | β |
| Logic Elements | 240 | 240 (192 macrocells) |
| Macrocells | 192 | β |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | β |
| User I/Os | 80 | 80 |
| User Flash Memory (UFM) | 8 Kbits | β |
| Core Supply Voltage (VCCINT) | 1.8 V | β |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | β |
| Package | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Configuration Memory | On-chip non-volatile flash | Non-volatile Flash |
| Process Technology | 0.18 Β΅m 6-layer-metal flash | CMOS, Flash-based |
| JTAG Support | IEEE 1149.1 (programming + boundary-scan) | β |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | -40 C to +125 C |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free / RoHS | Compliant per datasheet | β |
| Pin-to-Pin Delay (tPD) | β | 4.7 ns |
| Ball Pitch | β | 0.5 mm |
| Supply Voltage - Core | β | 3.3 V |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Programming Interface | β | JTAG (IEEE 1149.1) - ISP |
| Lead Free / RoHS | β | Yes / Compliant |
| MSL Level | β | 3 |