EPM240ZM68C7N vs EPM240ZM68C6N Comparison

Detailed side-by-side comparison of EPM240ZM68C7N by Intel and EPM240ZM68C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM240ZM68C7N EPM240ZM68C6N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $4.20 $5.10
Family MAX II MAX II Z (CPLD)
Logic Elements (LE) 240 240
Equivalent Macrocells 192 β€”
Maximum Operating Frequency 123.5 MHz β€”
User Flash Memory 8 Kbits β€”
Core Supply Voltage 1.8 V (internal regulation from external VCCIO/JTAG) β€”
I/O Voltages Supported 3.3 V, 2.5 V, 1.8 V (MultiVolt I/O) β€”
Number of I/O Pins [DATA_NEEDED: I/O count] β€”
Configuration Memory Non-volatile on-chip flash On-chip flash (non-volatile, instant-on)
Process Technology 0.18 Β΅m 6-layer-metal flash CMOS 0.18 Β΅m
Package 68-ball Micro BGA (MBGA) 68-ball Micro FBGA (MBGA-68)
Mounting Type Surface Mount Surface Mount (BGA)
JTAG Support IEEE 1149.1 boundary-scan, in-system programmable β€”
Operating Temperature [DATA_NEEDED: temperature grade] β€”
RoHS Status Compliant Compliant
Standby Power Zero standby current (Z-series) β€”
Macrocells β€” 192
Maximum Propagation Delay (tPD) β€” 7.5 ns
Internal Performance (fMAX) β€” 184.1 MHz
User I/O Count β€” 80
Number of I/O Banks β€” 4
Core Supply Voltage (VCCINT) β€” 1.8 V
I/O Supply Voltage (VCCIO) β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked)
Programming Interface β€” JTAG (IEEE 1149.1 / IEEE 1532)
Operating Temperature Range β€” -40Β°C to +85Β°C (commercial, 'C' suffix)
Lead-Free Finish β€” Yes
MSL Level β€” 3 (per JEDEC J-STD-020)

Datasheets & Resources

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