EPM3128ATC100-5 vs EPM3128ATC100-10N Comparison
Detailed side-by-side comparison of EPM3128ATC100-5 by Intel and EPM3128ATC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N NrndSpecification Comparison
| Parameter | EPM3128ATC100-5 | EPM3128ATC100-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.43 | $5.20 |
| Series | MAX 3000A | β |
| Family | CPLD - MAX 3000A | MAX 3000A |
| Macrocells | 128 | β |
| Usable Gates | 2,500 | 2500 |
| User I/Os | 80 | β |
| Dedicated Inputs | 4 | β |
| Pin-to-Pin Delay (tpd) | 5 ns (commercial); 7.5 ns | β |
| Maximum Frequency (fCNT) | 192.3 MHz | β |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | β |
| Output Drive Voltage | 2.5 V or 3.3 V (programmable) | β |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | β |
| Program Memory Type | EEPROM | β |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | β |
| JTAG Boundary Scan | Yes, IEEE Std. 1149.1 | β |
| Operating Temperature | 0 Β°C to 70 Β°C (Commercial) | 0 Β°C to +70 Β°C (commercial) |
| Package | 100-pin TQFP (Fine Line) | 100-pin TQFP (14 x 14 x 1.0 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Logic Family | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Process Technology | CMOS EEPROM | β |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 128 |
| Number of I/O | β | 80 |
| Logic Elements / Blocks | β | 8 LABs (16 macrocells each) |
| Propagation Delay (tPD) | β | 10 ns |
| Maximum Internal Frequency (fMAX) | β | 98 MHz |
| Supply Voltage VCCINT | β | 3.3 V |
| I/O Bank Voltage VCCIO | β | 3.3 V or 2.5 V (selectable) |
| Configuration Memory | β | CMOS EEPROM (non-volatile, instant-on) |
| In-System Programming | β | IEEE Std. 1532-compliant ISP via JTAG |
| Lead-Free | β | Yes |
| MSL Level | β | 3 (per JEDEC J-STD-020) |