EPM3128ATC144-10 vs EPM3128ATC100-10N Comparison

Detailed side-by-side comparison of EPM3128ATC144-10 by Altera and EPM3128ATC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATC144-10 EPM3128ATC100-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $6.20 $5.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 128 128
User I/Os 96 β€”
Usable Gates 2,500 (typical) 2500
Logic Elements / LABs 4 Logic Array Blocks β€”
Propagation Delay (tPD) 10 ns (speed grade -10) 10 ns
Counter Frequency (fCNT) Up to 227.3 MHz β€”
Supply Voltage (VCCINT) 3.3 V β€”
MultiVolt I/O Interface 1.5V / 1.8V / 2.5V / 3.3V β€”
In-System Programmability IEEE Std. 1532 compliant β€”
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) β€”
Configuration Memory EEPROM (non-volatile, instant-on) CMOS EEPROM (non-volatile, instant-on)
Package 144-pin TQFP (TQ144) 100-pin TQFP (14 x 14 x 1.0 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) 0 Β°C to +70 Β°C (commercial)
RoHS Status Compliant Compliant
Lead-Free Yes Yes
Product Type β€” CPLD (Complex Programmable Logic Device)
Number of I/O β€” 80
Logic Elements / Blocks β€” 8 LABs (16 macrocells each)
Maximum Internal Frequency (fMAX) β€” 98 MHz
Supply Voltage VCCINT β€” 3.3 V
I/O Bank Voltage VCCIO β€” 3.3 V or 2.5 V (selectable)
In-System Programming β€” IEEE Std. 1532-compliant ISP via JTAG
MSL Level β€” 3 (per JEDEC J-STD-020)

Datasheets & Resources

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