EPM3128ATI10010N vs EPM3128ATC100-10NS Comparison
Detailed side-by-side comparison of EPM3128ATI10010N by Altera and EPM3128ATC100-10NS by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATI10010N
EPM3128ATI10010N - MAX 3000A CPLD 128MC 100TQFP | Altera
EPM3128ATI10010N β ActiveIntel
EPM3128ATC100-10NS
EPM3128ATC100-10NS - MAX 3000A CPLD, 128 Macro, 100-TQFP | Intel
EPM3128ATC100-10NS ObsoleteSpecification Comparison
| Parameter | EPM3128ATI10010N | EPM3128ATC100-10NS |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.10 | $6.50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | β |
| Usable Gates | 2,500 | β |
| User I/Os | 80 | 80 |
| Number of Pins | 100 | β |
| Package | 100-pin TQFP | TQFP-100 |
| Mounting Type | Surface Mount | Surface Mount |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency | 98 MHz | β |
| Core Supply Voltage | 3.0 V to 3.6 V | β |
| I/O Bank Voltage | 1.8 V / 2.5 V / 3.3 V | β |
| Operating Temperature | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Process Technology | CMOS EEPROM | β |
| Programming Interface | JTAG (IEEE 1149.1) ISP | β |
| PCI Compliance | Yes (speed grades -5/-6/-7/-10) | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| Pin Count | β | 100 |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Counter Frequency (fCNT) | β | up to 227.3 MHz |
| Supply Voltage - Core (VCCINT) | β | 3.3 V |
| Supply Voltage - I/O (VCCIO) | β | 3.3 V or 2.5 V (5.0 V-tolerant inputs) |
| Logic-Level Compatibility | β | 5.0 V, 3.3 V, 2.5 V |
| Programmability | β | In-system (ISP), IEEE Std. 1532 |
| Boundary Scan | β | IEEE 1149.1 JTAG |
| Configuration Memory | β | EEPROM (non-volatile) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |