EPM3256AFC256-7 vs EPM3128AFI256-10N Comparison
Detailed side-by-side comparison of EPM3256AFC256-7 by Altera and EPM3128AFI256-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128AFI256-10N - MAX 3000A CPLD, 128 Macros, 256-FBGA | Altera
EPM3128AFI256-10N β ActiveSpecification Comparison
| Parameter | EPM3256AFC256-7 | EPM3128AFI256-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.10 | $9.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macro Cells | 256 | 128 |
| Logic Array Blocks (LABs) | 16 | β |
| Usable Gates | 10,000 | β |
| User I/Os | 161 | 98 |
| Pin-to-Pin Logic Delay | 4.5 ns (max) | β |
| Counter Frequency | 227.3 MHz (max) | β |
| Propagation Delay (tpd) | 10 ns | β |
| Core Voltage | 3.3 V | β |
| I/O Compatibility | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) | 5.0 V, 3.3 V, 2.5 V (MultiVolt) |
| Process Technology | CMOS EEPROM, 0.30 Β΅m | β |
| In-System Programmability | IEEE Std. 1532-compliant 3.3-V ISP | Yes (JTAG / IEEE 1149.1) |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | β |
| Package | FBGA-256 (FineLine BGA), 256 balls | 256-ball FineLine BGA (FBGA-256) |
| Operating Temperature | 0 Β°C to 70 Β°C (Commercial) | -40C to +85C (industrial, per 'I' suffix) |
| Speed Grade | -7 | -10 (10 ns pin-to-pin) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Logic Density | β | 2.5K gates |
| Propagation Delay (tPD) | β | 10 ns |
| Counter Frequency (max) | β | 227.3 MHz |
| Logic Family | β | CMOS, EEPROM-based |
| Supply Voltage (Core) | β | 3.3 V |
| Pin Count | β | 256 |
| Configuration Memory | β | EEPROM (non-volatile) |
| PCI Compliance | β | PCI Local Bus Spec Rev 2.2 |