EPM5016PC-1 vs EPM5016DI-20 Comparison
Detailed side-by-side comparison of EPM5016PC-1 by Altera and EPM5016DI-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5016PC-1 | EPM5016DI-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $8.50 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 16 | 16 |
| Usable Gates | 200 | β |
| Logic Array Blocks (LABs) | 1 | β |
| Propagation Delay (tPD) | 35 ns | 20 ns |
| Maximum Frequency (fMAX) | 62 MHz | β |
| Setup Time (tSU) | [DATA_NEEDED: setup time ns] | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | β |
| Supply Current (ICC) | 50 mA typical | β |
| Operating Temperature | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Package | PDIP-20 (plastic DIP, through-hole) | 20-pin Ceramic DIP (DI), windowed |
| Pin Count | 20 | β |
| Configuration Memory | CMOS EEPROM (UV-erasable) | β |
| Programming Interface | Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) | β |
| RoHS Status | Non-compliant (PDIP with SnPb leads, pre-RoHS era) | [DATA_NEEDED: RoHS compliance] |
| Device Type | β | EPLD (UV-erasable CMOS) |
| Maximum Clock Frequency | β | 62.5 MHz |
| Total Inputs | β | 16 |
| Dedicated Inputs | β | 7 |
| Configurable I/O Pins | β | 8 |
| External Clock Inputs | β | 1 |
| Product Terms per Output | β | 8 |
| Output Functions per Macrocell | β | 8 |
| Technology | β | CMOS EPROM |
| Programmable Interconnect | β | PIA (Programmable Interconnect Array) |
| Speed Grade | β | -20 (20 ns tPD) |
| Supply Voltage | β | [DATA_NEEDED: VCC nominal] |