EPM5032PC-15 vs EPM5032PC-20 Comparison

Detailed side-by-side comparison of EPM5032PC-15 by Altera and EPM5032PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032PC-15 EPM5032PC-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.10 $7.05
Device Family MAX 5000 MAX 5000
Device Type EPLD (Erasable PLD) CPLD (Complex Programmable Logic Device)
Macro Cells 32 β€”
Usable Gates 600 600
Logic Elements / LABs 1 LAB (4 macrocells per group) β€”
Propagation Delay (tPD) 15 ns 20 ns
Maximum Internal Frequency 76.9 MHz (some sources list 83.3 MHz) β€”
Operating Voltage (VCC) 5 V (typ.) β€”
Technology Node 0.8 micron CMOS β€”
Configuration Memory UV-Erasable EPROM β€”
Dedicated Inputs 7 24
Bidirectional I/O Pins 16 β€”
Total Array Inputs 24 β€”
Package 28-pin PDIP (PC suffix = windowed CerDIP) PDIP-28 (Plastic DIP, 28-pin)
Pin/Package Suffix PC = Windowed Ceramic DIP β€”
Speed Grade 15 (15 ns tPD) β€”
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Programming Tool Altera Logic Programmer + MAX+plus II β€”
RoHS Status Non-compliant (CerDIP window, contains Be) [DATA_NEEDED: RoHS status]
Lead-Free No β€”
Mounting Type Through-Hole (DIP) Through-Hole
Programming Type β€” OTP (One-Time Programmable)
Macrocells β€” 32
Logic Blocks β€” 2 Logic Array Blocks
Product Terms β€” 320
Bidirectional I/O Lines β€” 16
Maximum Clock Frequency β€” 62.5 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (nominal 5 V)
Technology β€” CMOS, 0.65 um process
Architecture β€” PAL-type macrocells with Programmable Interconnect Array (PIA)

Datasheets & Resources

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