EPM5032PC-20 vs EPM5032PC-15 Comparison

Detailed side-by-side comparison of EPM5032PC-20 by Altera and EPM5032PC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032PC-20 EPM5032PC-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.05 $8.10
Device Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) EPLD (Erasable PLD)
Programming Type OTP (One-Time Programmable) β€”
Macrocells 32 β€”
Usable Gates 600 600
Logic Blocks 2 Logic Array Blocks β€”
Product Terms 320 β€”
Dedicated Inputs 24 7
Bidirectional I/O Lines 16 β€”
Propagation Delay (tPD) 20 ns 15 ns
Maximum Clock Frequency 62.5 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) β€”
Technology CMOS, 0.65 um process β€”
Architecture PAL-type macrocells with Programmable Interconnect Array (PIA) β€”
Package PDIP-28 (Plastic DIP, 28-pin) 28-pin PDIP (PC suffix = windowed CerDIP)
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Mounting Type Through-Hole Through-Hole (DIP)
RoHS Status [DATA_NEEDED: RoHS status] Non-compliant (CerDIP window, contains Be)
Macro Cells β€” 32
Logic Elements / LABs β€” 1 LAB (4 macrocells per group)
Maximum Internal Frequency β€” 76.9 MHz (some sources list 83.3 MHz)
Operating Voltage (VCC) β€” 5 V (typ.)
Technology Node β€” 0.8 micron CMOS
Configuration Memory β€” UV-Erasable EPROM
Bidirectional I/O Pins β€” 16
Total Array Inputs β€” 24
Pin/Package Suffix β€” PC = Windowed Ceramic DIP
Speed Grade β€” 15 (15 ns tPD)
Programming Tool β€” Altera Logic Programmer + MAX+plus II
Lead-Free β€” No

Datasheets & Resources

Browse All Products Create BOM Request Quote