EPM5064JC1 vs EPM5064LC-2 Comparison

Detailed side-by-side comparison of EPM5064JC1 by Altera and EPM5064LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5064JC1 EPM5064LC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $1.05 $8.40
Family MAX 5000 β€”
Device Type CPLD / EPLD (Erasable PLD) β€”
Macrocells 64 64
Logic Array Blocks (LABs) 4 4
Usable Gates 1.25K β€”
Maximum Operating Frequency (fCNT) 62.5 MHz β€”
External Clock Input (max) 50 MHz β€”
I/O Pins 28 β€”
Dedicated Inputs 7 β€”
Total Inputs 36 (28 I/O + 7 dedicated + 1 clock) β€”
Operating Voltage (VCC) 5 V β€”
Program Type EPROM (one-time programmable, UV-erasable) β€”
Process Technology CMOS CMOS, OTP EPROM (UV-erasable base)
Package 44-pin PLCC (J-Lead) PLCC-44 (J-Lead, plastic)
Operating Temperature (JC suffix) 0Β°C to +70Β°C (commercial) β€”
Supply Current (ICC) [DATA_NEEDED: ICC maximum] β€”
RoHS Status unknown [DATA_NEEDED: not specified in source]
Lead-Free Status unknown β€”
Device Family β€” MAX 5000
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Elements per LAB β€” 16
Number of Inputs β€” 36 (7 dedicated + 28 I/O)
Number of I/O Pins β€” 28
Number of Flip-Flops β€” 28
Propagation Delay (tPD) β€” 45 ns
Maximum Internal Frequency β€” 40 MHz
Programmable Polarity β€” Yes
Programmable Output Enable β€” Yes, per macrocell
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Operating Temperature β€” -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source]
Mounting Type β€” Surface Mount
Programming Method β€” Altera byte-wide / JTAG programmer

Datasheets & Resources

Browse All Products Create BOM Request Quote