EPM5064LC vs EPM5064JC Comparison
Detailed side-by-side comparison of EPM5064LC by Altera and EPM5064JC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5064LC | EPM5064JC |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.10 | $7.10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable PLD) |
| Programming Type | OTP (One-Time-Programmable, UV-erasable EPROM) | β |
| Macro Cells | 64 | β |
| Usable Gates | 1.25K | 1,250 (approx.) |
| Logic Array Blocks (LABs) | 4 | β |
| Propagation Delay (tPD) | 55 ns | β |
| Total Inputs | 36 (7 dedicated + 29 I/O) | β |
| I/O Pins | 28 bidirectional + 4 dedicated input | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V (typical, 4.75 V - 5.25 V range) |
| Operating Temperature | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature grade] |
| Package | PLCC-44 (LCC-44, J-lead) | 68-pin PLCC (JEDEC) |
| Process Technology | CMOS EPROM | β |
| Mounting Type | Surface Mount | Surface Mount (socketed) |
| RoHS Status | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] | [DATA_NEEDED: RoHS compliance] |
| Lead Free | [DATA_NEEDED: lead-free status] | β |
| Macrocells | β | 64 |
| Logic Array Inputs | β | 36 |
| Logic Array Outputs | β | 64 |
| I/O Logic Level | β | TTL / CMOS compatible |
| Configuration Memory | β | EPROM (UV-erasable window or OTP) |
| Pin-to-Pin Delay (tPD) | β | [DATA_NEEDED: specific tPD grade value] |
| Maximum Frequency (fMAX) | β | [DATA_NEEDED: fCNT grade value] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| MSL Level | β | [DATA_NEEDED: MSL rating] |
| Programming Tool | β | Altera MAX+PLUS II / Quartus II (legacy device support) |