EPM5064LI vs EPM5064LC-2 Comparison

Detailed side-by-side comparison of EPM5064LI by Altera and EPM5064LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5064LC-2

EPM5064LC-2 - 64-Macrocell MAX 5000 CPLD, 45ns, PLCC44 | Altera

EPM5064LC-2 Obsolete

Specification Comparison

Parameter EPM5064LI EPM5064LC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $8.40
Family MAX 5000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 64 64
Logic Array Blocks (LABs) 4 4
Number of Terminals 44 β€”
Package Code QCCJ (PLCC-44, J-bend) β€”
Package Shape Square β€”
Configuration Memory UV-Erasable / OTP (EPROM-based) β€”
Supply Voltage (VCC) 4.5 V to 5.5 V 4.75 V to 5.25 V (5 V nominal)
Operating Temperature Grade Industrial β€”
Maximum Clock Frequency 33.3 MHz β€”
Propagation Delay (tPD) 55 ns (typical) 45 ns
I/O Pins 28 bidirectional β€”
Dedicated Inputs 7 β€”
Total User Inputs 36 β€”
Process Technology 1-micron EPIC CMOS CMOS, OTP EPROM (UV-erasable base)
Latch-up Immunity 500 mA typical at 125 C β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: confirm RoHS status - legacy Altera part] [DATA_NEEDED: not specified in source]
Device Family β€” MAX 5000
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Elements per LAB β€” 16
Number of Inputs β€” 36 (7 dedicated + 28 I/O)
Number of I/O Pins β€” 28
Number of Flip-Flops β€” 28
Maximum Internal Frequency β€” 40 MHz
Programmable Polarity β€” Yes
Programmable Output Enable β€” Yes, per macrocell
Operating Temperature β€” -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source]
Package β€” PLCC-44 (J-Lead, plastic)
Programming Method β€” Altera byte-wide / JTAG programmer

Datasheets & Resources

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