EPM5128GC-1 vs EPM5064LC-2 Comparison

Detailed side-by-side comparison of EPM5128GC-1 by Altera and EPM5064LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128GC-1 EPM5064LC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.95 $8.40
Family MAX 5000 β€”
Device Type UV-erasable CMOS CPLD β€”
Macrocells 128 64
Usable Gates 2,500 β€”
Dedicated Inputs 7 β€”
Maximum User I/O Pins 52 β€”
Nominal Supply Voltage 5 V β€”
Supply Voltage Range 4.75 V to 5.25 V β€”
Maximum Operating Frequency 62.5 MHz β€”
Propagation Delay (tPD) 16 ns (typical, -1 speed grade) 45 ns
Package PGA-96+ (Pin Grid Array, ceramic windowed) PLCC-44 (J-Lead, plastic)
Technology CMOS, UV-erasable EPROM β€”
Operating Temperature -40C to +85C (industrial) -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source]
IOL / IOH 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) β€”
Security Bit Programmable, prevents readback β€”
Programming Method UV erase + EPROM program (or device programmer) Altera byte-wide / JTAG programmer
MSL Level [DATA_NEEDED: MSL level] β€”
RoHS Status [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] [DATA_NEEDED: not specified in source]
Device Family β€” MAX 5000
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) β€” 4
Logic Elements per LAB β€” 16
Number of Inputs β€” 36 (7 dedicated + 28 I/O)
Number of I/O Pins β€” 28
Number of Flip-Flops β€” 28
Maximum Internal Frequency β€” 40 MHz
Process Technology β€” CMOS, OTP EPROM (UV-erasable base)
Programmable Polarity β€” Yes
Programmable Output Enable β€” Yes, per macrocell
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Mounting Type β€” Surface Mount

Datasheets & Resources

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