EPM5192AQI100-20 vs EPM5192AQM100-20 Comparison
Detailed side-by-side comparison of EPM5192AQI100-20 by Altera and EPM5192AQM100-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192AQI100-20 - MAX 5000 192-Macrocell EPLD, 20ns, PQFP-100 | Altera
EPM5192AQI100-20 ObsoleteIntel
EPM5192AQM100-20 - MAX 5000 CPLD 64 I/O 33ns PQFP-100 | Intel / Altera
EPM5192AQM100-20 ObsoleteSpecification Comparison
| Parameter | EPM5192AQI100-20 | EPM5192AQM100-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.90 | $8.20 |
| Family | MAX 5000 EPLD | β |
| Device Series | EPM5192 | β |
| Technology | CMOS, UV-erasable EPROM | β |
| Propagation Delay | 20 ns (speed grade -20) | β |
| Logic Array Blocks (LABs) | 12 | β |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| Macrocell Count | 192 | β |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 64 bidirectional | β |
| Package | 100-pin PQFP (R-PQFP-G100) | 100-pin PQFP (JESD-30 code R-PQFP-G100) |
| JEDEC Package Outline | R-PQFP-G100 | β |
| Operating Temperature | Industrial grade ("I" suffix) | β |
| Mounting Type | Surface Mount (PQFP) | Surface Mount |
| Architecture | Classic EPLD, deterministic timing | β |
| Design Tool | Altera MAX+PLUS II (legacy) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: verified from manufacturer product page] |
| Supply Voltage | [DATA_NEEDED: VCC range] | [DATA_NEEDED: VCC range from datasheet] |
| Device Family | β | MAX 5000 (EPLD / classic CPLD) |
| Logic Elements | β | 192 macrocells across 12 Logic Array Blocks (LABs) |
| Number of LABs | β | 12 |
| User I/O Lines | β | 64 |
| Pin-to-Pin Propagation Delay (tPD) | β | 33 ns |
| Maximum Clock Frequency (fMAX) | β | 66.7 MHz |
| Process Technology | β | CMOS EPROM-based |
| Configuration Memory | β | On-chip EPROM (non-volatile, one-time programmable in this package) |
| Boundary-Scan Test | β | JTAG / IEEE 1149.1 compatible |
| External Clock Input | β | Yes (global clock pin) |
| Operating Temperature Grade | β | [DATA_NEEDED: explicit temperature grade from datasheet] |