EPM5192JC84-1 vs EPM5192JC-1 Comparison

Detailed side-by-side comparison of EPM5192JC84-1 by Altera and EPM5192JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JC84-1 EPM5192JC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.20 $22.40
Device Type UV-Erasable/OTP Complex Programmable Logic Device (CPLD) CPLD - Complex Programmable Logic Device
Family MAX 5000 MAX 5000
Macrocells 192 192
Propagation Delay (tpd) 40 ns (worst case) β€”
Supply Voltage (Vcc) 4.75 V to 5.25 V (5 V Β±5 %) β€”
Process Technology CMOS EPROM β€”
Operating Temperature Grade Commercial β€”
Package 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) β€”
JESD-30 Package Code S-CQCC-J84 β€”
Terminal Form J-BEND β€”
Package Shape SQUARE β€”
Mounting Type Surface Mount β€”
Programmability UV-erasable (window) / OTP in production β€”
Configuration Memory EPROM (non-volatile, instant-on) UV-EPROM (erasable under UV lamp)
RoHS Status [DATA_NEEDED: RoHS status] β€”
Technology β€” CMOS, UV-Erasable / OTP
Usable Gates β€” 3750
Propagation Delay (tPD) β€” 40 ns (speed grade -1)
Maximum Internal Frequency (fMAX) β€” 62.5 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
User I/O Pins β€” 84
Package Type β€” 84-pin Ceramic Quad Flat Pack (CQFP), windowed
JEDEC Package Code β€” S-CQCC-J84
Operating Temperature β€” 0 C to +70 C (commercial)
Programming Interface β€” Altera MAX programming interface (parallel, pre-JTAG for this family)
Process β€” CMOS EPROM
I/O Standard β€” TTL/CMOS 5 V compatible

Datasheets & Resources

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