EPM7128SQC100-10N vs EPM7128SQC100-10 Comparison

Detailed side-by-side comparison of EPM7128SQC100-10N by Altera and EPM7128SQC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SQC100-10N EPM7128SQC100-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $14.95 $9.85
Family MAX 7000 MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 128
Usable Gates 2,500 β€”
Logic Array Blocks (LABs) 8 (16 macro cells each) 16
User I/O Pins 84 β€”
Propagation Delay (tPD) 10 ns β€”
Maximum Frequency 100 MHz β€”
Supply Voltage (VCCINT) 5 V (4.75 V to 5.25 V) β€”
I/O Voltage Tolerance 3.3 V or 5 V (MultiVolt interface) β€”
Package 100-pin PQFP (BQFP) 100-pin PQFP (Plastic Quad Flat Pack)
Configuration Memory EEPROM (non-volatile) β€”
Programming Interface JTAG (IEEE Std 1149.1), 4-pin β€”
Operating Temperature -40C to +85C (industrial) 0C to +70C (commercial)
Mounting Type Surface Mount Surface Mount
Lead-Free / RoHS Status Lead-free (N suffix) β€”
Architecture Generation Second-generation MAX β€”
Logic Elements / Gates β€” 2,500 usable gates
Maximum User I/O β€” 84
Maximum Operating Frequency β€” 100 MHz
Pin-to-Pin Logic Delay (tPD) β€” 10 ns
Supply Voltage β€” 5 V
Process Technology β€” 5V CMOS, EEPROM-based
Programmability β€” In-System Programmable (ISP) via JTAG
RoHS Status β€” [DATA_NEEDED: rohs_status]

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