EPM7128SQI100-10 vs EPM7128SQC100-10 Comparison

Detailed side-by-side comparison of EPM7128SQI100-10 by Altera and EPM7128SQC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7128SQI100-10

EPM7128SQI100-10 - MAX 7000S CPLD 128-Macrocell 84-IO 10ns | Altera

EPM7128SQI100-10 Obsolete
Altera
EPM7128SQC100-10

EPM7128SQC100-10 - MAX 7000S CPLD, 128 Macro, 84 I/O | Altera

EPM7128SQC100-10 Obsolete

Specification Comparison

Parameter EPM7128SQI100-10 EPM7128SQC100-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.75 $9.85
Family MAX 7000S MAX 7000S
Device Type CPLD - Complex Programmable Logic Device CPLD (Complex Programmable Logic Device)
Macro Cells 128 128
User I/Os 84 β€”
Usable Gates 2,500 β€”
Logic Blocks (LABs) 8 (16 macrocells each) β€”
Package Type PQFP-100 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Internal Frequency 125 MHz to 250 MHz β€”
Counter Speed Up to 175.4 MHz β€”
Operating Voltage (VCC) 5 V β€”
Operating Temperature -40C to +85C (Industrial) 0C to +70C (commercial)
Configuration Memory EEPROM (non-volatile) β€”
Program/Erase Cycles 100 minimum β€”
In-System Programming Yes (JTAG IEEE 1149.1) β€”
Logic Family CMOS β€”
I/O Compatibility TTL-compatible, 5V/3.3V multi-voltage β€”
RoHS Status [DATA_NEEDED: RoHS status not in provided data] [DATA_NEEDED: rohs_status]
Logic Elements / Gates β€” 2,500 usable gates
Maximum User I/O β€” 84
Logic Array Blocks (LABs) β€” 16
Maximum Operating Frequency β€” 100 MHz
Pin-to-Pin Logic Delay (tPD) β€” 10 ns
Supply Voltage β€” 5 V
Process Technology β€” 5V CMOS, EEPROM-based
Programmability β€” In-System Programmable (ISP) via JTAG
Package β€” 100-pin PQFP (Plastic Quad Flat Pack)
Mounting Type β€” Surface Mount

Datasheets & Resources

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