EPM7128SQI100-15N vs EPM7128SQC100-15 Comparison

Detailed side-by-side comparison of EPM7128SQI100-15N by Intel and EPM7128SQC100-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7128SQC100-15 EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel

EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel

EPM7128SQC100-15 ⚠ Last Time Buy

Specification Comparison

Parameter EPM7128SQI100-15N EPM7128SQC100-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $4.85 $8.20
Family MAX 7000S MAX 7000
Device Type EE-PLD / CPLD CPLD (Complex Programmable Logic Device)
Macrocells 128 128
User I/Os 80 84
Usable Gates 2,500 (typical) β€”
Propagation Delay (tPD) 15 ns β€”
Maximum Frequency (fCNT) 76.9 MHz β€”
Core Supply Voltage (VCCINT) 4.5 V to 5.5 V β€”
I/O Logic Levels 3.3 V or 5 V (multi-volt I/O) β€”
Operating Temperature Grade Industrial (-40C to +85C) β€”
Package PQFP-100 (R-PQFP-G100) 100-pin PQFP (Plastic Quad Flat Pack)
Terminal Form Gull Wing β€”
Package Code QFP β€”
Mounting Type Surface Mount Surface Mount
Process Technology CMOS β€”
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
Non-volatile Configuration EEPROM (instant-on) β€”
RoHS Status Lead-free (N suffix) Non-compliant (SnPb lead finish - legacy PQFP)
Logic Array Blocks (LABs) β€” 4 (16 macrocells each)
Pin-to-Pin Delay (tPD) β€” 15 ns
Maximum Frequency (fMAX) β€” [DATA_NEEDED: fMAX value]
Typical Gate Count β€” 2,500 gates
Supply Voltage (VCCINT) β€” 5 V (5% tolerance)
Programming Technology β€” EEPROM (in-system programmable via JTAG)
JTAG Interface β€” IEEE Std. 1149.1 compliant
Operating Temperature β€” 0C to +70C (Commercial)
MSL Level β€” 3 (168 hours)

Datasheets & Resources

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