EPM7128SQI100-15N vs EPM7128STI100-10N Comparison
Detailed side-by-side comparison of EPM7128SQI100-15N by Intel and EPM7128STI100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N ObsoleteSpecification Comparison
| Parameter | EPM7128SQI100-15N | EPM7128STI100-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.85 | $9.85 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | EE-PLD / CPLD | β |
| Macrocells | 128 | 128 |
| User I/Os | 80 | β |
| Usable Gates | 2,500 (typical) | 2,500 (up to 5,000 family max) |
| Propagation Delay (tPD) | 15 ns | β |
| Maximum Frequency (fCNT) | 76.9 MHz | β |
| Core Supply Voltage (VCCINT) | 4.5 V to 5.5 V | β |
| I/O Logic Levels | 3.3 V or 5 V (multi-volt I/O) | β |
| Operating Temperature Grade | Industrial (-40C to +85C) | β |
| Package | PQFP-100 (R-PQFP-G100) | 100-pin TQFP |
| Terminal Form | Gull Wing | β |
| Package Code | QFP | β |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (JTAG IEEE 1149.1) |
| Non-volatile Configuration | EEPROM (instant-on) | β |
| RoHS Status | Lead-free (N suffix) | [DATA_NEEDED: RoHS status] |
| Architecture | β | CMOS EEPROM-based CPLD |
| Logic Array Blocks (LABs) | β | 8 |
| Maximum User I/O | β | 84 |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 175.4 MHz |
| Supply Voltage (VCC) | β | 5 V |
| JTAG Boundary-Scan | β | Yes (BST) |
| Operating Temperature | β | -40C to +85C (Industrial) |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| Open-Drain I/O Option | β | Available (per MAX 7000A feature set) |