EPM7160ELI84-20 vs EPM7160ELC84-20 Comparison
Detailed side-by-side comparison of EPM7160ELI84-20 by Intel and EPM7160ELC84-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7160ELI84-20
EPM7160ELI84-20 - MAX 7000 CPLD, 160 Macrocells, 5V, 84-PLCC | Intel
EPM7160ELI84-20 ObsoleteIntel
EPM7160ELC84-20
EPM7160ELC84-20 - MAX 7000 CPLD, 160 Macrocells, 20ns | Intel
EPM7160ELC84-20 ObsoleteSpecification Comparison
| Parameter | EPM7160ELI84-20 | EPM7160ELC84-20 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.10 | $16.95 |
| Series | MAX 7000 | β |
| Device Family | MAX 7000 (Complex Programmable Logic Device) | β |
| Number of Macrocells | 160 | β |
| Number of Logic Array Blocks (LABs) | 4 | β |
| Usable Gates | 3.2K | 3,200 |
| Number of User I/O Pins | 64 | β |
| Maximum Operating Frequency | 62.5 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns (speed grade '-20') | β |
| Supply Voltage (VCC) | 5.0 V | 5.0 V |
| Process Technology | CMOS, EEPROM-based configuration | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| Programmable Security | Yes (security bit) | β |
| Package | 84-Pin PLCC (J-Lead) | PLCC-84 (windowed ceramic carrier not applicable - plastic) |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket compatible) |
| Operating Temperature | -40C to +85C (Industrial grade 'I') | β |
| RoHS Status | Not Compliant (per Arrow listing) | [DATA_NEEDED: RoHS compliance per specific part marking] |
| Configuration Memory | Non-volatile EEPROM (instant-on) | β |
| Family | β | MAX 7000 |
| Macrocells | β | 160 |
| Logic Array Blocks | β | 4 |
| User I/O Pins | β | 64 |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Operating Temperature (Commercial) | β | 0C to +70C |
| Programming Interface | β | IEEE 1149.1 JTAG (ISP) |
| In-System Programmable | β | Yes (5.0-V ISP) |
| Technology | β | CMOS EEPROM |
| Architecture | β | Second-generation MAX |
| Global Clock Inputs | β | 4 |
| Logic Element Type | β | EEPROM-based macrocell |