EPM9320ALC84-20 vs EPM9320ALC84-10 Comparison
Detailed side-by-side comparison of EPM9320ALC84-20 by Altera and EPM9320ALC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALC84-20 | EPM9320ALC84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.50 | $19.80 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | β |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/Os | 212 | β |
| Pin-to-Pin Delay (tPD) | 20 ns | 10 ns |
| Package | PLCC-84 | 84-pin PLCC (J-Lead) |
| Process Technology | 0.5 Β΅m CMOS EEPROM | β |
| Supply Voltage | 5.0 V | β |
| Programmability | In-system via IEEE 1149.1 JTAG | β |
| Operating Temperature | [DATA_NEEDED: commercial or industrial grade] | [DATA_NEEDED: commercial/industrial grade] |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount / Through-Hole (PLCC socket) |
| Configuration Memory | Non-volatile EEPROM | β |
| Boundary Scan | JTAG IEEE 1149.1 | β |
| Design Software | MAX+PLUS II / Quartus II (legacy) | β |
| RoHS Status | [DATA_NEEDED: per Altera datasheet] | [DATA_NEEDED] |
| Device | β | EPM9320 |
| Maximum User I/O Pins | β | 52 |
| Dedicated Inputs | β | 16 |
| Speed Grade | β | -10 (10 ns pin-to-pin delay) |
| Supply Voltage (VCCINT) | β | 5.0 V |
| In-System Programmability | β | 5.0 V ISP via IEEE 1149.1 JTAG |
| Technology | β | CMOS EEPROM-based, third-generation MAX |
| PCI Compliance | β | PCI Local Bus Specification Rev. 2.2 (speed grade -10) |
| Non-Volatile Configuration | β | Yes (EEPROM cell, powers up in known state) |
| Architecture | β | MAX (Multiple Array MatriX) with FastTrack Interconnect |