EPM9320ALI84-10N vs EPM9320ALC84-15 Comparison

Detailed side-by-side comparison of EPM9320ALI84-10N by Altera and EPM9320ALC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320ALI84-10N EPM9320ALC84-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $21.95 $9.95
Family MAX 9000 MAX 9000 CPLD
Device Type CPLD (Complex Programmable Logic Device) β€”
Architecture MAX (Multiple Array MatriX), 3rd generation β€”
Process Technology CMOS EEPROM β€”
Usable Gates 6,000 to 12,000 6000
Macrocells 320 320
Logic Array Blocks (LABs) 20 16
User I/O Pins 56 β€”
Pin-to-Pin Delay 10 ns β€”
Maximum Counter Frequency 144.9 MHz β€”
VCCINT (Core Supply) 5.0 V β€”
VCCIO (I/O Supply) 3.3 V or 5.0 V β€”
Input Logic Levels TTL-compatible (at 5.0 V VCCINT) β€”
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) β€”
Package 84-pin PLCC (J-lead, 1.270 mm pitch) 84-pin PLCC (S-PQCC-J84, J-lead)
Mounting Type Surface Mount (PLCC socket compatible) Through-hole / socket
Operating Temperature -40C to +85C (industrial) -40C to +85C (industrial)
Configuration Memory EEPROM, non-volatile β€”
Propagation Delay (tPD) β€” 16 ns
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
User I/O β€” 56
Technology β€” CMOS, EEPROM-based configuration
Programming Interface β€” JTAG (IEEE 1149.1) / ISP
RoHS Status β€” [DATA_NEEDED: rohs status]
Moisture Sensitivity Level (MSL) β€” MSL-3 (168 hours per fpgalink.com)
Lead-Free / Halogen-Free β€” [DATA_NEEDED: lead free status]
RoHS3 Compliance β€” ROHS3 Compliant (per fpgalink.com listing)

Datasheets & Resources

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