EPM9320ALI84-10N vs EPM9320LC84-20N Comparison

Detailed side-by-side comparison of EPM9320ALI84-10N by Altera and EPM9320LC84-20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320ALI84-10N EPM9320LC84-20N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $21.95 $10.25
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture MAX (Multiple Array MatriX), 3rd generation β€”
Process Technology CMOS EEPROM β€”
Usable Gates 6,000 to 12,000 6,000
Macrocells 320 320
Logic Array Blocks (LABs) 20 β€”
User I/O Pins 56 β€”
Pin-to-Pin Delay 10 ns β€”
Maximum Counter Frequency 144.9 MHz β€”
VCCINT (Core Supply) 5.0 V β€”
VCCIO (I/O Supply) 3.3 V or 5.0 V β€”
Input Logic Levels TTL-compatible (at 5.0 V VCCINT) β€”
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) β€”
Package 84-pin PLCC (J-lead, 1.270 mm pitch) β€”
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount (J-bend)
Operating Temperature -40C to +85C (industrial) 0 C to +70 C (Commercial)
Configuration Memory EEPROM, non-volatile β€”
Series β€” MAX 9000
Logic Family β€” CMOS (EEPROM-based)
User I/Os β€” 60
Number of Pins β€” 84
Package Type β€” Plastic Leaded Chip Carrier (PLCC-84, J-bend)
Package Code β€” QCCJ
Propagation Delay (tPD) β€” 16 ns
Internal Frequency β€” 118 MHz
Supply Voltage (VCC) β€” 5 V
Programming β€” 5.0-V In-System Programmable via JTAG (IEEE 1149.1)
Terminal Form β€” J BEND
MSL Level β€” [DATA_NEEDED: MSL moisture sensitivity level]
RoHS Status β€” [DATA_NEEDED: RoHS compliance status]

Datasheets & Resources

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