EPM9320RI208-20N vs EPM9560RI208-15N Comparison
Detailed side-by-side comparison of EPM9320RI208-20N by Altera and EPM9560RI208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320RI208-20N | EPM9560RI208-15N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $19.45 |
| Device Family | MAX 9000 (EPM9320) | MAX 9000 |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | β |
| Macrocells | 320 | β |
| Flip-Flops | 484 | β |
| Propagation Delay (tPD) | 20 ns | 11.4 ns (15 ns speed grade) |
| Supply Voltage (VCC) | 5.0 V | β |
| I/O Voltage Tolerance | 3.3 V or 5 V configurable | β |
| Package | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin RQFP (Ruggedized Quad Flat Pack) |
| Package Lead Pitch | 0.500 mm | β |
| Number of Terminals | 208 | β |
| Operating Temperature Range | -40C to +85C (Industrial) | β |
| In-System Programmability | Yes, 5.0 V ISP via JTAG | β |
| JTAG Interface | IEEE Std. 1149.1 compliant | β |
| Configuration Memory | EEPROM (non-volatile) | CMOS EEPROM, in-system programmable |
| Dedicated Input Pins | 4 (low-skew global distribution) | β |
| Minimum DC Input on I/O Pins | -0.5 V | β |
| Minimum DC Input on Dedicated Inputs | -0.3 V | β |
| Input Undershoot/ Overshoot | -2.0 V / 7.0 V for <20 ns (no-load) | β |
| Mounting Type | Surface Mount | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Manufacturer | β | Altera (Intel Programmable Solutions Group) |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| Architecture | β | Multiple Array MatriX (MAX), 3rd generation |
| Total Pins | β | 356 (per third-party catalog; see _validation_note) |
| Package Pin Count | β | 208 |
| Terminal Form | β | Gull Wing |
| Package Code | β | HFQFP |
| User I/Os | β | 216 (per DigiChip specification; see _validation_note) |
| Maximum Internal Frequency | β | 145 MHz |
| Speed Grade | β | -15 |
| Supply Voltage | β | 5.0 V |
| Operating Temperature | β | 0C to 70C (Commercial) |
| Temperature Grade | β | Industrial (per Vyrian/Partstack listings) |
| Logic Family | β | CMOS |
| Programming Interface | β | IEEE 1149.1 JTAG, 5.0-V in-system |