EPM9560RC208-13 vs EPM9560RC208-15N Comparison

Detailed side-by-side comparison of EPM9560RC208-13 by Altera and EPM9560RC208-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-13

EPM9560RC208-13 - MAX 9000 CPLD 560 Macrocell | Altera

EPM9560RC208-13 Obsolete
Intel
EPM9560RC208-15N

EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP

EPM9560RC208-15N ⚠ Last Time Buy

Specification Comparison

Parameter EPM9560RC208-13 EPM9560RC208-15N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $19.85
Device Family MAX 9000 EPLD β€”
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 20 16
User I/O Pins 208 β€”
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
Package Code RC208 β€”
Speed Grade -13 (13 ns pin-to-pin) -15 (15 ns tPD)
Propagation Delay (tPD) 13 ns β€”
Maximum Clock Frequency 125 MHz β€”
Supply Voltage 5.0 V β€”
Configuration Technology EEPROM (non-volatile) β€”
Programming Interface IEEE 1149.1 JTAG β€”
Operating Temperature Range 0C to +70C (commercial) β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: check part marking suffix for lead-free/RoHS]
Lead-Free Status [DATA_NEEDED: lead-free status] β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Series β€” MAX 9000
Device Type β€” CPLD (Complex Programmable Logic Device)
User I/O β€” 212 (in 208-RQFP, see family datasheet)
Pin-to-Pin Delay (tPD) β€” 15 ns
Maximum Internal Frequency β€” 117.6 MHz
Supply Voltage (VCCINT) β€” 5.0 V
Programmability β€” In-system via IEEE 1149.1 JTAG
Configuration Memory β€” CMOS EEPROM (non-volatile)
Operating Temperature (commercial) β€” 0C to +70C
Architecture β€” Multiple Array MatriX (MAX) - third generation

Datasheets & Resources

Browse All Products Create BOM Request Quote