EPM9560RC208-15 vs EPM9560RC208-15C Comparison
Detailed side-by-side comparison of EPM9560RC208-15 by Altera and EPM9560RC208-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC208-15
EPM9560RC208-15 - MAX 9000 CPLD 560 Macro Cells 5V | Altera
EPM9560RC208-15 ObsoleteAltera
EPM9560RC208-15C
EPM9560RC208-15C - MAX 9000 CPLD 560 Macro Cells | Altera
EPM9560RC208-15C ObsoleteSpecification Comparison
| Parameter | EPM9560RC208-15 | EPM9560RC208-15C |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | EEPROM-based CPLD (EPLD) |
| Usable Gates | 12,000 gates | 12,000 |
| Macro Cells | 560 macro cells | β |
| Pin-to-Pin Delay | 15 ns | β |
| Counter Speed | 117.6 MHz | β |
| Supply Voltage | 5.0 V | β |
| Configuration Technology | EEPROM (non-volatile) | β |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| Number of I/O Pins | [DATA_NEEDED: number of I/O pins] | β |
| Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Speed Grade | -15 (15 ns pin-to-pin) | -15 (15 ns) |
| Architecture | Third-generation Multiple Array MatriX (MAX) | β |
| Macrocells | β | 560 |
| User I/O Pins | β | 149 |
| Propagation Delay (tPD) | β | 15 ns |
| Maximum Counter Frequency | β | 117.6 MHz |
| Supply Voltage Range | β | 4.75 V to 5.25 V |
| Nominal Supply Voltage | β | 5.0 V |
| I/O Voltage Compatibility | β | 3.3 V or 5 V |
| Configuration Memory | β | EEPROM (non-volatile) |
| Operating Temperature Range | β | 0C to +70C (commercial) |
| Logic Architecture | β | Multiple Array MatriX (MAX) third generation |