EPM9560RC208-15 vs EPM9560RC208-16 Comparison

Detailed side-by-side comparison of EPM9560RC208-15 by Altera and EPM9560RC208-16 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-15

EPM9560RC208-15 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-15 Obsolete

Specification Comparison

Parameter EPM9560RC208-15 EPM9560RC208-16
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $52.40
Family MAX 9000 MAX 9000
Device Type EEPROM-based Complex Programmable Logic Device (CPLD) CPLD (Complex Programmable Logic Device)
Usable Gates 12,000 gates 12,000 (typical)
Macro Cells 560 macro cells β€”
Pin-to-Pin Delay 15 ns β€”
Counter Speed 117.6 MHz β€”
Supply Voltage 5.0 V β€”
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG β€”
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin Power Quad Flat Pack (RQFP)
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial/commercial temperature grade]
Number of I/O Pins [DATA_NEEDED: number of I/O pins] β€”
Logic Array Blocks [DATA_NEEDED: number of logic array blocks] β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Speed Grade -15 (15 ns pin-to-pin) -16
Architecture Third-generation Multiple Array MatriX (MAX) β€”
Logic Elements / Macrocells β€” 560 macrocells
Typical Gates β€” 12,000 gates
Pin-to-Pin Delay (tPD) β€” 16 ns
Maximum Internal Frequency (fMAX) β€” 117.6 MHz
Supply Voltage (VCCINT / VCCIO) β€” 5 V
User I/O Pins β€” 416
Process Technology β€” 0.35 Β΅m CMOS EEPROM
Programmability β€” In-system via JTAG (IEEE 1149.1)

Datasheets & Resources

Browse All Products Create BOM Request Quote