EPM9560RC208-17 vs EPM9560RC208-16 Comparison
Detailed side-by-side comparison of EPM9560RC208-17 by Altera and EPM9560RC208-16 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC208-17
EPM9560RC208-17 - MAX 9000 CPLD 12K Gates 560 Macro Cells | Altera
EPM9560RC208-17 NrndIntel
EPM9560RC208-16
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 NrndSpecification Comparison
| Parameter | EPM9560RC208-17 | EPM9560RC208-16 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $54.75 | $52.40 |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (EPLD, in-system programmable) | β |
| Usable Gates | 12,000 | 12,000 (typical) |
| Macro Cells | 560 | β |
| Logic Array Blocks (LABs) | 16 | β |
| Pin-to-Pin Delay (tPD) | 17 ns | 16 ns |
| Maximum Counter Frequency | 117.6 MHz | β |
| User I/O Pins | 212 | 416 |
| Supply Voltage (VCC) | 5 V | β |
| Package | 208-pin RQFP (RC208) | 208-pin Power Quad Flat Pack (RQFP) |
| Programming Technology | EEPROM (in-system programmable) | β |
| Program/Erase Cycles | 100 minimum | β |
| JTAG (IEEE 1149.1) Support | Yes | β |
| Architecture | Third-generation MAX (AND-OR PLA) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | β | 560 macrocells |
| Typical Gates | β | 12,000 gates |
| Maximum Internal Frequency (fMAX) | β | 117.6 MHz |
| Supply Voltage (VCCINT / VCCIO) | β | 5 V |
| Process Technology | β | 0.35 Β΅m CMOS EEPROM |
| Programmability | β | In-system via JTAG (IEEE 1149.1) |
| Operating Temperature | β | [DATA_NEEDED: industrial/commercial temperature grade] |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance status] |
| Speed Grade | β | -16 |