EPM9560RC304-15N vs EPM9560RC304-15F Comparison

Detailed side-by-side comparison of EPM9560RC304-15N by Altera and EPM9560RC304-15F by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC304-15N EPM9560RC304-15F
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.80 $18.75
Family MAX 9000 β€”
Product Type CPLD (Complex Programmable Logic Device) β€”
Architecture Multiple Array MatriX (MAX) - 3rd generation Multiple Array MatriX (MAX) with PIA interconnect
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 (estimated from 560 macrocells) 16 (40 macrocells each)
Maximum Operating Frequency (fMAX) 117.6 MHz β€”
Pin-to-Pin Propagation Delay 15 ns (-15 speed grade) β€”
Supply Voltage (VCCINT) 5 V β€”
Package RQFP-304 RQFP-304 (304-pin Plastic QFP)
User I/O Count 304 (package-level) β€”
Process Technology High-performance CMOS EEPROM High-performance CMOS, EEPROM-based
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
Operating Temperature Grade Commercial (suffix N) β€”
RoHS Status Compliant (lead-free per suffix N marking) [DATA_NEEDED: rohs status - not stated in source]
Device Family β€” MAX 9000
Series β€” EPM9560
Propagation Delay (tpd) β€” 16.6 ns (max)
Maximum Internal Frequency β€” 117.6 MHz
Core Supply Voltage β€” 5.0 V
User I/O Pins β€” 212
Dedicated Inputs β€” 4
Programming Technology β€” 5.0 V in-system EEPROM via JTAG (IEEE 1149.1)
Boundary Scan Test (BST) β€” Yes, JTAG-compliant
Operating Temperature β€” -40C to +85C (industrial)
Mounting Type β€” Surface Mount
MSL Level β€” 3 (168 hours)

Datasheets & Resources

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